Semiconductor Package

FIG. 1 is a front view of a semiconductor package showing my new design;

FIG. 2 is a rear view thereof;

FIG. 3 is a left side view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a top plan view thereof;

FIG. 6 is a bottom plan view thereof; and,

FIG. 7 is a perspective view thereof.

The broken lines illustrate portions of the article and environmental subject matter that form no part of the claimed design.