- US12099790utility2024High-speed Communication Between Integrated Circuits of an Emulation System0 cites
- US12093394utility2024System and Method for Secure Deconstruction Sensor in a Heterogeneous Integration Circuitry0 cites
- US12086083utility2024Multi-tenant Aware Data Processing Units0 cites
- US12086521utility2024Circuit Design Simulation and Clock Event Reduction0 cites
- US12086572utility2024Software Defined Neural Network Layer Pipelining0 cites
- US12086576utility2024Method for Mitigating Memory Access Conflicts in a Multi-core Graph Compiler0 cites
- US12079158utility2024Reconfigurable Neural Engine with Extensible Instruction Set Architecture0 cites
- US12079484utility2024Random Reads Using Multi-port Memory and On-chip Memory Blocks0 cites
- US12081238utility2024Registration of a PUF Signature and Regeneration Using a Trellis Decoder0 cites
- US12072239utility2024Circuits and Methods for Wavelength Locking of Optical Receiver WDM Filters0 cites
- US12073155utility2024Method and System for Building Hardware Images from Heterogeneous Designs for Electronic Systems0 cites
- US12073973utility2024Opposite-facing Interleaved Transformer Design0 cites
- US12066969utility2024IC with Adaptive Chip-to-chip Interface to Support Different Chip-to-chip0 cites
- US12067406utility2024Multiple Overlays for Use with a Data Processing Array0 cites
- US12067484utility2024Learning Neural Networks of Programmable Device Blocks Directly with Backpropagation0 cites
- US12068257utility2024Integrated Circuit (IC) Structure Protection Scheme0 cites
- US12061990utility2024Static Block Scheduling in Massively Parallel Software Defined Hardware Systems0 cites
- US12063129utility2024Frequency Detector for Clock Data Recovery0 cites
- US12056505utility2024Distributed Configuration of Programmable Devices0 cites
- US12050944utility2024Network Attached MPI Processing Architecture in Smartnics0 cites