- US12124379utility2024Management Circuitry for a Least Recently Used Memory Management Process0 cites
- US12124780utility2024Power Estimation Using Input Vectors and Deep Recurrent Neural Networks0 cites
- US12124782utility2024Machine Learning-enabled Estimation of Path-based Timing Analysis Based on Graph-based Timing Analysis0 cites
- US12126714utility2024Key Protection Using a Noising and De-noising Scheme0 cites
- US12117488utility2024Multiple Clock and Clock Cycle Selection for X-tolerant Logic Built in Self Test (XLBIST)0 cites
- US12118283utility2024Automatic Channel Identification of High-bandwidth Memory Channels for Auto-routing0 cites
- US12119827utility2024Glitch Filter with Reset Circuit0 cites
- US12119828utility2024Clock Synthesizer with Dual Control0 cites
- US12112202utility2024Framework for Application Driven Exploration and Optimization of Hardware Engines0 cites
- US12112818utility2024Scan Chain Compression for Testing Memory of a System on a Chip0 cites
- US12106157utility2024Memory Efficient and Scalable Approach to Stimulus (waveform) Reading0 cites
- US12093620utility2024Multi-cycle Power Analysis of Integrated Circuit Designs0 cites
- US12094513utility2024Power Supply Tracking Circuitry for Embedded Memories0 cites
- US12094548utility2024Diagnosing Faults in Memory Periphery Circuitry0 cites
- US12095474utility2024Using Multiple Error Correction Code Decoders to Store Extra Data in a Memory System0 cites
- US12085970utility2024High-voltage IO Drivers0 cites
- US12086523utility2024Adaptive Row Patterns for Custom-tiled Placement Fabrics for Mixed Height Cell Libraries0 cites
- US12079558utility2024On-the-fly Multi-bit Flip Flop Generation0 cites