Patents/Assignees

ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.

141 patents in portfolio

US12266545utility2025
Structures and Methods for Integrated Cold Plate in Xpus and Memory
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US12266640utility2025
Molded Direct Bonded and Interconnected Stack
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US12266650utility2025
Stacked Dies and Methods for Forming Bonded Structures
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US12261099utility2025
Embedded Cooling Systems with Coolant Channel for Device Packaging
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US12243851utility2025
Offset Pads Over TSV
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US12218107utility2025
Electrical Redundancy for Bonded Structures
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US12211809utility2025
Structure with Conductive Feature and Method of Forming Same
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US12205926utility2025
TSV as Pad
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US12198981utility2025
Diffusion Barrier Collar for Interconnects
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US12199011utility2025
Embedded Liquid Cooling
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US12199069utility2025
Heterogeneous Annealing Method and Device
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US12191233utility2025
Embedded Cooling Systems and Methods of Manufacturing Embedded Cooling Systems
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US12191234utility2025
Integrated Cooling Assemblies for Advanced Device Packaging and Methods of Manufacturing the Same
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US12191235utility2025
Integrated Cooling Assemblies Including Signal Redistribution and Methods of Manufacturing the Same
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US12183659utility2024
Embedded Cooling Assemblies for Advanced Device Packaging and Methods of Manufacturing the Same
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US12176263utility2024
Integrated Cooling Assembly Including Coolant Channel on the Backside Semiconductor Device
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US12176264utility2024
Manifold Designs for Embedded Liquid Cooling in a Package
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US12176294utility2024
Bonded Structure with Interconnect Structure
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US12176303utility2024
Wafer-level Bonding of Obstructive Elements
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US12174246utility2024
Security Circuitry for Bonded Structures
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