Patents/Inventors

Zhongguang Xu

San Jose, CAUS49 patents

32 Patents

US126021692026
Reliability Gain in Memory Devices with Adaptively Selected Erase Policies
Micron Technology, Inc.
0 cites
US126031382026
Partial Block Read Voltage Offset
Micron Technology, Inc.
0 cites
US125722982026
Adaptive Scans of Memory Devices of a Memory Sub-system
Micron Technology, Inc.
0 cites
US125370682026
Half Good Block Handling with Defective Deck Pre-programing in a Memory Sub-system
Micron Technology, Inc.
0 cites
US125058992025
Power Loss Error Detection Using Partial Block Handling
Micron Technology, Inc.
0 cites
US125058942025
Select Gate Maintenance with Adaptive Scan Frequency in a Memory Sub-system
Micron Technology, Inc.
0 cites
US124814262025
Optimizing Data Reliability Using Erase Retention
MICRON TECHNOLOGY, Inc.
0 cites
US124501542025
Selection of Erase Policy in a Memory Device
Micron Technology, Inc.
0 cites
US124511892025
Partial Block Handling Protocol in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites
US124232272025
Generating Virtual Blocks Using Partial Good Blocks
Micron Technology, Inc.
0 cites
US124057372025
Adaptive Generation of Memory Partitions
Micron Technology, Inc.
0 cites
US123546842025
Managing an Adaptive Data Path Selection Threshold for a Memory Sub-system
Micron Technology, Inc.
0 cites
US122724182025
Performing Select Gate Integrity Checks to Identify and Invalidate Defective Blocks
Micron Technology, Inc.
0 cites
US122609162025
Partial Block Handling in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites
US122165292025
Adaptive Frequency Control for High-speed Memory Devices
Micron Technology, Inc.
0 cites
US122107522025
Managing a Hybrid Error Recovery Process in a Memory Sub-system
Micron Technology, Inc.
0 cites
US121824332024
Adaptive Memory Partition Closure Time
Micron Technology, Inc.
0 cites
US121760602024
Open Translation Unit Management Using an Adaptive Read Threshold
Micron Technology, Inc.
0 cites
US120272112024
Partial Block Handling Protocol in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites
US119291272024
Selective Data Pattern Write Scrub for a Memory System
Micron Technology, Inc.
0 cites
US119010142024
Partial Block Handling in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites
US118812842024
Open Translation Unit Management Using an Adaptive Read Threshold
Micron Technology, Inc.
0 cites
US118611782024
Managing a Hybrid Error Recovery Process in a Memory Sub-system
Micron Technology, Inc.
0 cites
US118546442023
Performing Select Gate Integrity Checks to Identify and Invalidate Defective Blocks
Micron Technology, Inc.
0 cites
US117625892023
Dynamic Read-level Thresholds in Memory Systems
Micron Technology, Inc.
0 cites
US117639142023
Adapting an Error Recovery Process in a Memory Sub-system
Micron Technology, Inc.
0 cites
US117409592023
Dynamic Voltage Setting Optimization During Lifetime of a Memory Device
Micron Technology, Inc.
0 cites
US117420292023
Adjusting Read-level Thresholds Based on Write-to-write Delay
Micron Technology, Inc.
0 cites
US117420532023
Managing Execution of a Scrub Operation in View of an Operating Characteristic of a Memory Subsystem
Micron Technology, Inc.
0 cites
US117213812023
Performing Refresh Operations of a Memory Device According to a Dynamic Refresh Frequency
Micron Technology, Inc.
0 cites
US116872482023
Life Time Extension of Memory Device Based on Rating of Individual Memory Units
Micron Technology, Inc.
0 cites
US116150082023
Temperature and Inter-pulse Delay Factors for Media Management Operations at a Memory Device
Micron Technology, Inc.
0 cites