Zhiquan Wan

4 Patents

• US121121152024

  Routing Structure and Method of Wafer Substrate with Standard Integration Zone for Integration On-wafer

  ZHEJIANG LAB

  0 cites
• US119834812024

  Software-defined Wafer-level Switching System Design Method and Apparatus

  ZHEJIANG LAB

  0 cites
• US118879642024

  Wafer-level Heterogeneous Dies Integration Structure and Method

  ZHEJIANG LAB

  0 cites
• US118760712024

  System-on-wafer Structure and Fabrication Method

  ZHEJIANG LAB

  0 cites