Patents/Inventors

Zhengang Chen

San Jose, CAUS39 patents

32 Patents

US125853882026
Selectively Enabling Valley Track for Reading Data
Micron Technology, Inc.
0 cites
US125473442026
Corrective Read of a Memory Device with Reduced Latency
Micron Technology, Inc.
0 cites
US125413982026
Management of Unmapped Allocation Units of a Memory Sub-system
Micron Technology, Inc.
0 cites
US125110592025
Power Efficient Codeword Scrambling in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites
US125058882025
Memory Device Producing Metadata Characterizing Applied Read Voltage Level with Respect to Voltage Distributions
Micron Technology Inc.
0 cites
US125058992025
Power Loss Error Detection Using Partial Block Handling
Micron Technology, Inc.
0 cites
US124934152025
Program Pulse Modification
Micron Technology, Inc.
0 cites
US124312022025
Memory Read Calibration Based on Memory Device-originated Metrics Characterizing Voltage Distributions
Micron Technology, Inc.
0 cites
US123865152025
Modification of Program Voltage Level with Read or Program-verify Adjustment for Improving Reliability in Memory Devices
Micron Technology, Inc.
0 cites
US123327432025
Efficient Memory Use to Support Soft Information in Bit Flipping Decoders
MICRON TECHNOLOGY, Inc.
0 cites
US123012542025
Early Stopping of Bit-flip Low Density Parity Check Decoding Based on Syndrome Weight
Micron Technology, Inc.
0 cites
US121977432025
Parity Protection in Non-volatile Memory
Micron Technology, Inc.
0 cites
US120860582024
Self-seeded Randomizer for Data Randomization in Flash Memory
Micron Technology, Inc.
0 cites
US120672642024
Power Efficient Codeword Scrambling in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites
US120078372024
Redundancy Metadata Schemes for Rain Protection of Large Codewords
Micron Technology, Inc.
0 cites
US119145102024
Layer Interleaving in Multi-layered Memory
Micron Technology, Inc.
0 cites
US119075802024
Corrective Read of a Memory Device with Reduced Latency
Micron Technology, Inc.
0 cites
US118704612024
Failure-tolerant Error Correction Layout for Memory Sub-systems
Micron Technology, Inc.
0 cites
US117827872023
Dynamic Error Control Configuration for Memory Systems
Micron Technology, Inc.
0 cites
US117753812023
Redundancy Metadata Schemes for RAIN Protection of Large Codewords
Micron Technology, Inc.
0 cites
US117687662023
Metadata Aware Copyback for Memory Devices
Micron Technology, Inc.
0 cites
US117502182023
Iterative Error Correction with Adjustable Parameters After a Threshold Number of Iterations
Micron Technology, Inc.
0 cites
US117266712023
Memory Access Mode Selection
Micron Technology, Inc.
0 cites
US117097712023
Self-seeded Randomizer for Data Randomization in Flash Memory
Micron Technology, Inc.
0 cites
US116884672023
Defect Detection in Memories with Time-varying Bit Error Rate
Micron Technology, Inc.
0 cites
US116884852023
Self-adaptive Read Voltage Adjustment Using Boundary Error Statistics for Memories with Time-varying Error Rates
Micron Technology, Inc.
0 cites
US116321322023
Configuring Iterative Error Correction Parameters Using Criteria from Previous Iterations
Micron Technology, Inc.
0 cites
US116252992023
Inserting Temperature Information Into a Codeword
Micron Technology, Inc.
0 cites
US116158302023
Performing a Refresh Operation Based on a Characteristic of a Memory Sub-system
Micron Technology, Inc.
0 cites
US115798092023
Performing a Refresh Operation Based on a Write to Read Time Difference
Micron Technology, Inc.
0 cites
US115617342023
Selecting Read Voltage Using Write Transaction Data
MICRON TECHNOLOGY, Inc.
0 cites
US115452302023
Manufacturer Self-test for Solid-state Drives
Seagate Technology LLC
0 cites