33 Patents
- 0 cites
- 0 cites
- US125110592025Power Efficient Codeword Scrambling in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites - 0 cites
- US124501662025Caching Host Memory Address Translation Data in a Memory Sub-system
Micron Technology, Inc.
0 cites - 0 cites
- US124057262025Managing Write Command Execution During a Power Failure in a Memory Sub-system
Micron Technology, Inc.
0 cites - US123012542025Early Stopping of Bit-flip Low Density Parity Check Decoding Based on Syndrome Weight
Micron Technology, Inc.
0 cites - 0 cites
- 0 cites
- 0 cites
- 0 cites
- 0 cites
- 0 cites
- 0 cites
- 0 cites
- 0 cites
- 0 cites
- US120672642024Power Efficient Codeword Scrambling in a Non-volatile Memory Device
Micron Technology, Inc.
0 cites - US120140712024Separation of Parity Columns in Bit-flip Decoding of Low-density Parity-check Codes with Pipelining and Column Parallelism
Micron Technology, Inc.
0 cites - 0 cites
- US119968602024Scaled Bit Flip Thresholds Across Columns for Irregular Low Density Parity Check Decoding
Micron Technology, Inc.
0 cites - 0 cites
- 0 cites
- 0 cites
- 0 cites
- US117502182023Iterative Error Correction with Adjustable Parameters After a Threshold Number of Iterations
Micron Technology, Inc.
0 cites - 0 cites
- 0 cites
- 0 cites
- US116509312023Hybrid Logical to Physical Caching Scheme of L2P Cache and L2P Changelog
Micron Technology, Inc.
0 cites - 0 cites
- US116321322023Configuring Iterative Error Correction Parameters Using Criteria from Previous Iterations
Micron Technology, Inc.
0 cites