7 Patents
- US126140142026Grouping Cells in Cell Library Based on Iterative Clustering
Cadence Design Systems, Inc.
0 cites - US123397012025Insertion Delay and Area Tradeoff for Buffering Solution Selection in Clock Tree Synthesis
Cadence Design Systems, Inc.
0 cites - 0 cites
- US118686952024Driver Resizing Using a Transition-based Pin Capacitance Increase Margin
Cadence Design Systems, Inc.
0 cites - US116759562023Pruning Redundant Buffering Solutions Using Fast Timing Models
Cadence Design Systems, Inc.
0 cites - US116454412023Machine-learning Based Clustering for Clock Tree Synthesis
Cadence Design Systems, Inc.
0 cites - 0 cites