Patents/Inventors

Yi-lin Chuang

TaipeiTW21 patents

21 Patents

US123401582025
Circuit Synthesis Optimization for Implements on Integrated Circuit
Taiwan Semiconductor Manufacturing Company, Ltd.
0 cites
US123216822025
Post-routing Congestion Optimization
Taiwan Semiconductor Manufacturing Company, Ltd.
0 cites
US122993762025
Hard-to-fix (HTF) Design Rule Check (DRC) Violations Prediction
Taiwan Semiconductor Manufacturing Company, Ltd.
0 cites
US122427882025
Method and System for Generating Layout Design of Integrated Circuit
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY Ltd.
0 cites
US122169802025
Method and System for Fixing Violation of Layout
TSMC NANJING COMPANY LIMITED
0 cites
US121548512024
Method of Forming a Semiconductor Device with Inter-layer Vias
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
0 cites
US121060342024
Rule Check Violation Prediction Systems and Methods
Taiwan Semiconductor Manufacturing Co., Ltd.
0 cites
US120997932024
Rule Check Violation Prediction Systems and Methods
Taiwan Semiconductor Manufacturing Co., Ltd.
0 cites
US120392492024
System and Method for Diagnosing Design Rule Check Violations
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY Ltd.
0 cites
US120392512024
Cell Layout of Semiconductor Device
TAIWAN SEMICONDUCTOR MANUFACTURING CO., Ltd.
0 cites
US120199712024
Static Voltage Drop (SIR) Violation Prediction Systems and Methods
Taiwan Semiconductor Manufacturing Co., Ltd.
0 cites
US119284152024
Hard-to-fix (HTF) Design Rule Check (DRC) Violations Prediction
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
0 cites
US119000372024
Circuit Synthesis Optimization for Implements on Integrated Circuit
Taiwan Semiconductor Manufacturing Company, Ltd.
0 cites
US118933342024
Method for Optimizing Floor Plan for an Integrated Circuit
TSMC NANJING COMPANY LIMITED
0 cites
US118536752023
Method for Optimizing Floor Plan for an Integrated Circuit
TSMC NANJING COMPANY LIMITED
0 cites
US118536812023
Post-routing Congestion Optimization
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
0 cites
US118164172023
Rule Check Violation Prediction Systems and Methods
Taiwan Semiconductor Manufacturing Co., Ltd.
0 cites
US117099872023
Method and System for Generating Layout Design of Integrated Circuit
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY Ltd.
0 cites
US116049172023
Static Voltage Drop (SIR) Violation Prediction Systems and Methods
Taiwan Semiconductor Manufacturing Co., Ltd.
0 cites
US115681192023
Cell Layout of Semiconductor Device
TAIWAN SEMICONDUCTOR MANUFACTURING CO., Ltd.
0 cites
US115621182023
Hard-to-fix (HTF) Design Rule Check (DRC) Violations Prediction
Taiwan Semiconductor Manufacturing Company, Ltd.
0 cites