13 Patents
- US124023842025Standard Cell Design with Dummy Padding
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
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- US121311092024Block Level Design Method for Heterogeneous Pg-structure Cells
Taiwan Semiconductor Manufacturing Co., Ltd.
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- US119834752024Method for Manufacturing a Cell Having Pins and Semiconductor Device Based on Same
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
0 cites - US118536782023Block Level Design Method for Heterogeneous Pg-structure Cells
Taiwan Semiconductor Manufacturing Co., Ltd.
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- US115741062023Method, System, and Storage Medium of Resource Planning for Designing Semiconductor Device
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY Ltd.
0 cites - US115741072023Method for Manufacturing a Cell Having Pins and Semiconductor Device Based on Same
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
0 cites - US115741082023Block Level Design Method for Heterogeneous Pg-structure Cells
Taiwan Semiconductor Manufacturing Co., Ltd.
0 cites