Vivek Chickermane

7 Patents

• US125114622025

  Physical Awareness of Test-point Sharing in a Circuit Design

  Cadence Design Systems, Inc.

  0 cites
• US124881762025

  Systems and Methods for Reducing Test Point Power Consumption in a Circuit Design

  Cadence Design Systems, Inc.

  0 cites
• US124752882025

  Clock-based Test-point Flop Sharing in a Circuit Design

  Cadence Design Systems, Inc.

  0 cites
• US124304742025

  Locking Mechanism and Core Wrapping for IP Core

  Cadence Design Systems, Inc.

  0 cites
• US124120142025

  IC Chip with IC Design Modification Detection

  Cadence Design Systems, Inc.

  0 cites
• US120555862024

  3D Stacked Die Testing Structure

  Cadence Design Systems, Inc.

  0 cites
• US119478872024

  Test-point Flop Sharing with Improved Testability in a Circuit Design

  Cadence Design Systems, Inc.

  0 cites