7 Patents
- 0 cites
- US122126452025Reset Synchronizing Circuit and Glitchless Clock Buffer Circuit for Preventing Start-up Failure, and IQ Divider Circuit
SAMSUNG ELECTRONICS CO., Ltd.
0 cites - US119968542024Method and System for Low Noise Sub-sampling Phase Lock Loop (PLL) Architecture with Automatic Dynamic Frequency Acquisition
Samsung Electronics Co., Ltd.
0 cites - US119094072024Method and System of Dynamically Controlling Reset Signal of IQ Divider
SAMSUNG ELECTRONICS CO., Ltd.
0 cites - US118049452023Reset Synchronizing Circuit and Glitchless Clock Buffer Circuit for Preventing Start-up Failure, and IQ Divider Circuit
SAMSUNG ELECTRONICS CO., Ltd.
0 cites - US117287922023Apparatus and Method for In-phase and Quadrature Phase (IQ) Generation
SAMSUNG ELECTRONICS CO., Ltd.
0 cites - US116011162023System and Method for Generating Sub Harmonic Locked Frequency Division and Phase Interpolation
SAMSUNG ELECTRONICS CO., Ltd.
0 cites