Patents/Inventors

Theodore T. Pekny

San Jose, CAUS14 patents

15 Patents

US124628812025
Charge Loss Compensation During Read Operations in a Memory Device
Micron Technology, Inc.
0 cites
US123397882025
Block or Page Lock Features in Serial Interface Memory
0 cites
US123276092025
Apparatuses Including Multiple Read Modes and Methods for Same
Micron Technology, Inc.
0 cites
US122625362025
Arrays of Memory Cells Including Pairs of Memory Cells Having Respective Charge Storage Nodes Between Respective Access Lines
Micron Technology, Inc.
0 cites
US122301232025
Extracting the Resistor-capacitor Time Constant of an Electronic Circuit Line
Micron Technology, Inc.
0 cites
US120571742024
Charge Loss Compensation During Read Operations in a Memory Device
Micron Technology, Inc.
0 cites
US120090522024
Apparatuses Including Multiple Read Modes and Methods for Same
Micron Technology, Inc.
0 cites
US120025262024
Defect Detection During Program Verify in a Memory Sub-system
Micron Technology, Inc.
0 cites
US119552042024
Apparatuses and Methods for Concurrently Accessing Different Memory Planes of a Memory
Micron Technology, Inc.
0 cites
US118682782024
Block or Page Lock Features in Serial Interface Memory
0 cites
US118622552024
Charge Loss Detection Using a Multiple Sampling Scheme
Micron Technology, Inc.
0 cites
US117266902023
Independent Parallel Plane Access in a Multi-plane Memory Device
Micron Technology, Inc.
0 cites
US116578572023
Memory Devices Having Special Mode Access
Micron Technology, Inc.
0 cites
US116368862023
Memory Devices with User-defined Tagging Mechanism
Micron Technology, Inc.
0 cites
US116313192023
Resistor-capacitor Sensor Circuit
Micron Technology, Inc.
0 cites