Patents/Inventors

Tahir Ghani

Portland, ORUS184 patents

221 Patents

US126220522026
Integrated Circuit Structures Having Cut Metal Gates
Intel Corporation
0 cites
US126222552026
Integrated Circuit Structures with Pre-epitaxial Deep via Structure
Intel Corporation
0 cites
US126157522026
Stacked SRAM with Shared Wordline Connection
Intel Corporation
0 cites
US126158132026
Gate-all-around Integrated Circuit Structures Having Vertically Discrete Source or Drain Structures
Intel Corporation
0 cites
US126157622026
Three-dimensional Dynamic Random Access Memory with Stacked Semiconductor Structures
Intel Corporation
0 cites
US126160602026
Stacked Random-access Memory Devices with Refrigeration
Intel Corporation
0 cites
US126105542026
Multi-storage Element Single-transistor Crosspoint Memory Systems at Low Temperatures
Intel Corporation
0 cites
US126105272026
Integrated Circuit Structures Having Memory Access Transistor with Backside Contact
Intel Corporation
0 cites
US126045312026
Standard Cell Architecture Without Power Delivery Space Allocation
Intel Corporation
0 cites
US126044942026
Gate End Cap and Boundary Placement in Transistor Structures for N-metal Oxide Semiconductor (N-MOS) Performance Tuning
Intel Corporation
0 cites
US125988032026
Integrated Circuit Structures Having Gate Cut Offset
Intel Corporation
0 cites
US125987772026
Low Temperature, High Germanium, High Boron Sige:b Pepi with Titanium Silicide Contacts for Ultra-low PMOS Contact Resistivity and Thermal Stability
Intel Corporation
0 cites
US125881892026
Memory Devices with Vertical Transistors
Intel Corporation
0 cites
US125884852026
Integrated Circuit Structures Having Airgaps for Backside Signal Routing or Power Delivery
Intel Corporation
0 cites
US125751512026
Gate-all-around Integrated Circuit Structures Having Doped Subfin
Intel Corporation
0 cites
US125751702026
Low Temperature, High Germanium, High Boron Sige:b Pepi with a Silicon Rich Capping Layer for Ultra-low PMOS Contact Resistivity and Thermal Stability
Intel Corporation
0 cites
US125754012026
Integrated Circuit Devices with Angled Transistors and Angled Routing Tracks
Intel Corporation
0 cites
US125637242026
Two Transistor Memory Cells with Source-drain Coupling in One Transistor
Intel Corporation
0 cites
US125637742026
Integrated Circuit Structures with Deep via Structure
Intel Corporation
0 cites
US125637792026
Gate-all-around Integrated Structures Having Gate Height Reduction and Dielectric Capping Material with Shoulder Portions Inside Gate Stack
Intel Corporation
0 cites
US125637822026
Fabrication of Gate-all-around Integrated Circuit Structures Having Common Metal Gates and Having Gate Dielectrics with Differentiated Dipole Layers
Intel Corporation
0 cites
US125573632026
Gate Cut Structures Formed Before Dummy Gate
Intel Corporation
0 cites
US125576252026
Spacer Self-aligned via Structures Using Directed Self Assembly for Gate Contact or Trench Contact
Intel Corporation
0 cites
US125504012026
Doped STI to Reduce Source/drain Diffusion for Germanium NMOS Transistors
Intel Corporation
0 cites
US125507332026
Multiple Epitaxial Layer Source and Drain Transistors for Low Temperature Computation
Intel Corporation
0 cites
US125507322026
Single Conductivity Type Devices for Low Temperature Computation
Intel Corporation
0 cites
US125503812026
Device, Method and System to Provide Epitaxial Structures Opposite Sides of a Separation Layer Between Channel Stacks
Intel Corporation
0 cites
US125433492026
Transistors with Ferroelectric Gates
Intel Corporation
0 cites
US125435582026
Self-aligned Interconnect Features for Transistor Contacts
Intel Corporation
0 cites
US125384702026
Structures and Methods for Memory Cells
Intel Corporation
0 cites
US125384662026
Static Random-access Memory (SRAM) Bit Cell with Channel Depopulation
Intel Corporation
0 cites
US125325382026
Integrated Circuit Structures Having Conductive Structures in Fin Isolation Regions
Intel Corporation
0 cites
US125325262026
Metallic Sealants in Transistor Arrangements
Intel Corporation
0 cites
US125327262026
Jumper Gate for Advanced Integrated Circuit Structures
Intel Corporation
0 cites
US125139842025
Double-sided Integrated Circuit Transistor Structures with Depopulated Bottom Channel Regions
Intel Corporation
0 cites
US125074642025
Gate Aligned Fin Cut for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US125060752025
Epitaxial Source/drain Back-side Device Contact Structures with Wrap Around Metallization and Protective Conformal Liner
Intel Corporation
0 cites
US125061272025
Package Architecture of Photonic System with Vertically Stacked Dies Having Planarized Edges
Intel Corporation
0 cites
US125074492025
Gate-all-around Integrated Circuit Structures Having Necked Feature
Intel Corporation
0 cites
US125016842025
Integrated Circuit Structures with Backside Self-aligned Penetrating Conductive Source or Drain Contact
Intel Corporation
0 cites
US125016592025
Integrated Circuit Structures Having Dielectric Anchor Void
Intel Corporation
0 cites
US125016612025
Integrated Circuit Structures Having Differentiated Channel Sizing
Intel Corporation
0 cites
US124904622025
Angled Gate or Diffusion Plugs
Intel Corporation
0 cites
US124842722025
Source or Drain Structures with Relatively High Germanium Content
Intel Corporation
0 cites
US124842812025
Topside Plugs for Epitaxial Contact Formation
Intel Corporation
0 cites
US124842662025
Gate-all-around Integrated Circuit Structures Having Underlying Dopant-diffusion Blocking Layers
Intel Corporation
0 cites
US124842072025
SRAM with Channel Count Contrast for Greater Read Stability
Intel Corporation
0 cites
US124713302025
Integrated Circuit Structures Having Maximized Channel Sizing
Intel Corporation
0 cites
US124713622025
Integrated Circuit Structures Having Ultra-high Conductivity Global Routing
Intel Corporation
0 cites
US124713342025
Integrated Circuit Devices with Angled Transistors Formed Based on Angled Wafers
Intel Corporation
0 cites
US124713492025
Contact Over Active Gate Structures with Uniform and Conformal Gate Insulating Cap Layers for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US124697802025
Integrated Circuit Structure with Recessed Self-aligned Deep Boundary Via
Intel Corporation
0 cites
US124648152025
Fin Cut in Neighboring Gate and Source or Drain Regions for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US124577792025
Gate Cut Structures
Intel Corporation
0 cites
US124531602025
Deep Etch Processing for Transistors Having Varying Pitch
Intel Corporation
0 cites
US124396692025
Co-deposition of Titanium and Silicon for Improved Silicon Germanium Source and Drain Contacts
Intel Corporation
0 cites
US124263162025
Method of Fabricating Integrated Circuits with Fin Trim Plug Structures Having an Oxidation Catalyst Layer Surrounded by a Recessed Dielectric Material
Intel Corporation
0 cites
US124263602025
Wrap-around Trench Contact Structure and Methods of Fabrication
Intel Corporation
0 cites
US124262472025
Capacitor Connections in Dielectric Layers
Intel Corporation
0 cites
US124262302025
Fin Cut and Fin Trim Isolation for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US124263422025
Low Germanium, High Boron Silicon Rich Capping Layer for PMOS Contact Resistance Thermal Stability
Intel Corporation
0 cites
US124190912025
Source Electrode and Drain Electrode Protection for Nanowire Transistors
Intel Corporation
0 cites
US124190852025
Integrated Circuit Structures Having Backside Gate Tie-down
Intel Corporation
0 cites
US124143272025
Lateral Confinement of Source Drain Epitaxial Growth in Non-planar Transistor for Cell Height Scaling
Intel Corporation
0 cites
US124055262025
Extreme Ultraviolet Lithography Patterning with Assist Features
Intel Corporation
0 cites
US124084222025
Integrated Circuit Structures with Backside Gate Cut or Trench Contact Cut
Intel Corporation
0 cites
US124023492025
Gate-all-around Integrated Circuit Structures Having Devices with Channel-to-substrate Electrical Contact
Intel Corporation
0 cites
US123827212025
Integrated Circuit Structures Having Cut Metal Gates with Dielectric Spacer Fill
Intel Corporation
0 cites
US123827062025
Self-aligned Gate Endcap (SAGE) Architectures with Gate-all-around Devices
Intel Corporation
0 cites
US123693932025
Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Bottom-up Approach
Intel Corporation
0 cites
US123693922025
Fabrication of Gate-all-around Integrated Circuit Structures Having Pre-spacer Deposition Cut Gates
Intel Corporation
0 cites
US123640012025
Integrated Circuit Structures with Backside Gate Partial Cut or Trench Contact Partial Cut
Intel Corporation
0 cites
US123639672025
Integration Methods to Fabricate Internal Spacers for Nanowire Devices
Sony Group Corporation
0 cites
US123640022025
Integrated Circuit Structures Having Metal Gates with Tapered Plugs
Intel Corporation
0 cites
US123494162025
Transistor Structures with a Metal Oxide Contact Buffer and a Method of Fabricating the Transistor Structures
Intel Corporation
0 cites
US123494202025
Device, Method and System to Provide a Stressed Channel of a Transistor
Intel Corporation
0 cites
US123426122025
Neighboring Gate-all-around Integrated Circuit Structures Having Disjoined Epitaxial Source or Drain Regions
Intel Corporation
0 cites
US123362782025
Gate-all-around Integrated Circuit Structures Having High Mobility
Intel Corporation
0 cites
US123289052025
Cavity Spacer for Nanowire Transistors
Intel Corporation
0 cites
US123289202025
Nanoribbon Sub-fin Isolation by Backside Si Substrate Removal Etch Selective to Source and Drain Epitaxy
Intel Corporation
0 cites
US123100602025
Gate-all-around Integrated Circuit Structures Having Uniform Threshold Voltages and Tight Gate Endcap Tolerances
Intel Corporation
0 cites
US123100442025
Vertical Integration Scheme and Circuit Elements Architecture for Area Scaling of Semiconductor Devices
Intel Corporation
0 cites
US123026322025
Non-planar Integrated Circuit Structures Having Mitigated Source or Drain Etch from Replacement Gate Process
Intel Corporation
0 cites
US122940272025
Semiconductor Device Having Doped Epitaxial Region and Its Methods of Fabrication
Intel Corporation
0 cites
US122951702025
Fabrication of Gate-all-around Integrated Circuit Structures Having Additive Metal Gates and Gate Dielectrics with a Dipole Layer
Intel Corporation
0 cites
US122940062025
Gate-all-around Integrated Circuit Structures Having Insulator Substrate
Intel Corporation
0 cites
US122887892025
Gate-all-around Integrated Circuit Structures Having Devices with Source/drain-to-substrate Electrical Contact
Intel Corporation
0 cites
US122888032025
Transistor with Isolation Below Source and Drain
Intel Corporation
0 cites
US122888072025
Amorphization and Regrowth of Source-drain Regions from the Bottom-side of a Semiconductor Assembly
Intel Corporation
0 cites
US122781442025
Gate Contact Structure Over Active Gate and Method to Fabricate Same
Intel Corporation
0 cites
US122727372025
Gate-all-around Integrated Circuit Structures Having Adjacent Structures for Sub-fin Electrical Contact
Intel Corporation
0 cites
US122665712025
Self-aligned Contacts
Intel Corporation
0 cites
US122667082025
Integrated Circuit Structures Having Dielectric Anchor Void
Intel Corporation
0 cites
US122552342025
Integrated Circuit Structures Having Germanium-based Channels
Intel Corporation
0 cites
US122438752025
Forksheet Transistors with Dielectric or Conductive Spine
Intel Corporation
0 cites
US122374202025
Fin Smoothing and Integrated Circuit Structures Resulting Therefrom
Intel Corporation
0 cites
US122389132025
Two Transistor Memory Cell Using Stacked Thin-film Transistors
Intel Corporation
0 cites
US122307172025
Integrated Circuit Structures Having Partitioned Source or Drain Contact Structures
Intel Corporation
0 cites
US122307212025
Gate-all-around Integrated Circuit Structures Having Asymmetric Source and Drain Contact Structures
Intel Corporation
0 cites
US122243502025
Self-aligned Gate Endcap (SAGE) Architectures with Gate-all-around Devices
Intel Corporation
0 cites
US122119252025
Gate-all-around Integrated Circuit Structures Having Oxide Sub-fins
Intel Corporation
0 cites
US122060272025
Gate-all-around Integrated Circuit Structures Having Nanowires with Tight Vertical Spacing
Intel Corporation
0 cites
US122059552025
Fins for Metal Oxide Semiconductor Device Structures
Intel Corporation
0 cites
US121991432025
Gate-all-around Integrated Circuit Structures Having Removed Substrate
Intel Corporation
0 cites
US121913492025
Reducing Off-state Leakage in Semiconductor Devices
Intel Corporation
0 cites
US121913952025
Dual Gate Control for Trench Shaped Thin Film Transistors
Intel Corporation
0 cites
US121913082025
Non-planar Semiconductor Device Having Doped Sub-fin Region and Method to Fabricate Same
Tahoe Research, Ltd.
0 cites
US121764082024
Localized Spacer for Nanowire Transistors and Methods of Fabrication
Intel Corporation
0 cites
US121764292024
Wrap-around Contact Structures for Semiconductor Nanowires and Nanoribbons
Intel Corporation
0 cites
US121762842024
Through Plate Interconnect for a Vertical MIM Capacitor
Intel Corporation
0 cites
US121599012024
Gate-all-around Integrated Circuit Structures Having Source or Drain Structures with Epitaxial Nubs
Intel Corporation
0 cites
US121426672024
Contact Over Active Gate Structures for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US121259172024
Thin Film Transistors Having Double Gates
Intel Corporation
0 cites
US121194092024
Multi-layer Crystalline Back Gated Thin Film Transistor
Intel Corporation
0 cites
US121144792024
Three-dimensional Memory Arrays with Layer Selector Transistors
Intel Corporation
0 cites
US121130682024
Fabrication of Gate-all-around Integrated Circuit Structures Having Additive Metal Gates
Intel Corporation
0 cites
US121007052024
Deep Trench via for Three-dimensional Integrated Circuit
Intel Corporation
0 cites
US120949552024
Confined Epitaxial Regions for Semiconductor Devices
Intel Corporation
0 cites
US120806432024
Integrated Circuit Structures Having Differentiated Interconnect Lines in a Same Dielectric Layer
Intel Corporation
0 cites
US120683192024
High Performance Semiconductor Oxide Material Channel Regions for NMOS
Intel Corporation
0 cites
US120683142024
Fabrication of Gate-all-around Integrated Circuit Structures Having Adjacent Island Structures
Intel Corporation
0 cites
US120682062024
Extension of Nanocomb Transistor Arrangements to Implement Gate All Around
Intel Corporation
0 cites
US120574922024
Gate Cut and Fin Trim Isolation for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US120588492024
Three-dimensional Nanoribbon-based Dynamic Random-access Memory
Intel Corporation
0 cites
US120574912024
Self-aligned Gate Endcap (SAGE) Architectures with Gate-all-around Devices Above Insulator Substrates
Intel Corporation
0 cites
US120516982024
Fabrication of Gate-all-around Integrated Circuit Structures Having Molybdenum Nitride Metal Gates and Gate Dielectrics with a Dipole Layer
Intel Corporation
0 cites
US120465172024
Self-aligned 3-D Epitaxial Structures for MOS Device Fabrication
Tahoe Research, Ltd.
0 cites
US120338942024
Gate Aligned Contact and Method to Fabricate Same
Intel Corporation
0 cites
US120290212024
Static Random-access Memory (SRAM) Bit Cell with Channel Depopulation
Intel Corporation
0 cites
US120211412024
Multi-threshold Voltage Devices and Associated Techniques and Configurations
Sony Group Corporation
0 cites
US120211492024
Fin Smoothing and Integrated Circuit Structures Resulting Therefrom
Intel Corporation
0 cites
US120149592024
Integrated Nanowire and Nanoribbon Patterning in Transistor Manufacture
Intel Corporation
0 cites
US120161702024
Fin Cut and Fin Trim Isolation for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US120028102024
Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Bottom-up Approach
Intel Corporation
0 cites
US119963622024
Integrated Circuit Device with Crenellated Metal Trace Layout
Intel Corporation
0 cites
US119964472024
Field Effect Transistors with Gate Electrode Self-aligned to Semiconductor Fin
Intel Corporation
0 cites
US119978472024
Thin Film Transistors with Spacer Controlled Gate Length
Intel Corporation
0 cites
US119918732024
Capacitor Separations in Dielectric Layers
Intel Corporation
0 cites
US119904722024
Fabrication of Gate-all-around Integrated Circuit Structures Having Pre-spacer Deposition Cut Gates
Intel Corporation
0 cites
US119844492024
Channel Structures with Sub-fin Dopant Diffusion Blocking Layers
Intel Corporation
0 cites
US119788042024
Recessed Thin-channel Thin-film Transistor
Intel Corporation
0 cites
US119294352024
Ferroelectric Gate Stack for Band-to-band Tunneling Reduction
Intel Corporation
0 cites
US119293962024
Cavity Spacer for Nanowire Transistors
Intel Corporation
0 cites
US119234212024
Integrated Circuit Structures Having Germanium-based Channels
Intel Corporation
0 cites
US119234102024
Transistor with Isolation Below Source and Drain
Intel Corporation
0 cites
US119233702024
Forksheet Transistors with Dielectric or Conductive Spine
Intel Corporation
0 cites
US119089342024
Semiconductor Device Having Doped Epitaxial Region and Its Methods of Fabrication
Intel Corporation
0 cites
US119088562024
Gate-all-around Integrated Circuit Structures Having Devices with Source/drain-to-substrate Electrical Contact
Intel Corporation
0 cites
US119013472024
Microelectronic Package with Three-dimensional (3D) Monolithic Memory Die
Intel Corporation
0 cites
US118943682024
Gate-all-around Integrated Circuit Structures Fabricated Using Alternate Etch Selective Material
Intel Corporation
0 cites
US118878912024
Self-aligned Contacts
Intel Corporation
0 cites
US118698912024
Non-planar Integrated Circuit Structures Having Mitigated Source or Drain Etch from Replacement Gate Process
Intel Corporation
0 cites
US118699392024
Integration Methods to Fabricate Internal Spacers for Nanowire Devices
Sony Group Corporation
0 cites
US118699872024
Gate-all-around Integrated Circuit Structures Including Varactors
Intel Corporation
0 cites
US118626352024
Neighboring Gate-all-around Integrated Circuit Structures Having Disjoined Epitaxial Source or Drain Regions
Intel Corporation
0 cites
US118627282024
Dual Gate Control for Trench Shaped Thin Film Transistors
Intel Corporation
0 cites
US118552232023
Self-aligned Gate Endcap (SAGE) Architectures with Gate-all-around Devices
Intel Corporation
0 cites
US118430542023
Vertical Architecture of Thin Film Transistors
Intel Corporation
0 cites
US118430582023
Transistor Structures with a Metal Oxide Contact Buffer and a Method of Fabricating the Transistor Structures
Intel Corporation
0 cites
US118430522023
Transistor Contact Area Enhancement
Intel Corporation
0 cites
US118376412023
Gate-all-around Integrated Circuit Structures Having Adjacent Deep via Substrate Contacts for Sub-fin Electrical Contact
Intel Corporation
0 cites
US118376482023
Stacked Thin Film Transistors with Nanowires
Intel Corporation
0 cites
US118324382023
Capacitor Connections in Dielectric Layers
Intel Corporation
0 cites
US118241162023
Gate-all-around Integrated Circuit Structures Having Devices with Channel-to-substrate Electrical Contact
Intel Corporation
0 cites
US118241072023
Wrap-around Contact Structures for Semiconductor Nanowires and Nanoribbons
Intel Corporation
0 cites
US117990152023
Gate Cut and Fin Trim Isolation for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US117990372023
Gate-all-around Integrated Circuit Structures Having Asymmetric Source and Drain Contact Structures
Intel Corporation
0 cites
US117990092023
Gate-all-around Integrated Circuit Structures Having Adjacent Structures for Sub-fin Electrical Contact
Intel Corporation
0 cites
US117989912023
Amorphization and Regrowth of Source-drain Regions from the Bottom-side of a Semiconductor Assembly
Intel Corporation
0 cites
US117842392023
Subfin Leakage Suppression Using Fixed Charge
Intel Corporation
0 cites
US117770292023
Vertical Transistors for Ultra-dense Logic and Memory Applications
Intel Corporation
0 cites
US117769592023
Wrap-around Trench Contact Structure and Methods of Fabrication
Intel Corporation
0 cites
US117698362023
Gate-all-around Integrated Circuit Structures Having Nanowires with Tight Vertical Spacing
Intel Corporation
0 cites
US117643062023
Multi-layer Crystalline Back Gated Thin Film Transistor
Intel Corporation
0 cites
US117642752023
Indium-containing Fin of a Transistor Device with an Indium-rich Core
Intel Corporation
0 cites
US117643032023
Thin Film Transistors Having Double Gates
Intel Corporation
0 cites
US117587112023
Thin-film Transistor Embedded Dynamic Random-access Memory with Shallow Bitline
Intel Corporation
0 cites
US117568292023
Gate Aligned Contact and Method to Fabricate Same
Intel Corporation
0 cites
US117569982023
Source-channel Junction for III-V Metal-oxide-semiconductor Field Effect Transistors (mosfets)
Intel Corporation
0 cites
US117570042023
Transistors Including Source/drain Employing Double-charge Dopants
Intel Corporation
0 cites
US117570372023
Epitaxial Oxide Plug for Strained Transistors
Intel Corporation
0 cites
US117497332023
FIN Shaping Using Templates and Integrated Circuit Structures Resulting Therefrom
Intel Corporation
0 cites
US117424102023
Gate-all-around Integrated Circuit Structures Having Oxide Sub-fins
Intel Corporation
0 cites
US117424292023
Thin-film Transistors with Low Contact Resistance
Intel Corporation
0 cites
US117356302023
Integrated Circuit Structures with Source or Drain Dopant Diffusion Blocking Layers
Intel Corporation
0 cites
US117356702023
Non-selective Epitaxial Source/drain Deposition to Reduce Dopant Diffusion for Germanium NMOS Transistors
Intel Corporation
0 cites
US117217352023
Thin Film Transistors Having U-shaped Features
Intel Corporation
0 cites
US117157752023
Self-aligned Gate Endcap (SAGE) Architectures with Gate-all-around Devices Having Epitaxial Source or Drain Structures
Intel Corporation
0 cites
US117157872023
Self-aligned Nanowire
INTEL CORPORATION
0 cites
US117055182023
Isolation Schemes for Gate-all-around Transistor Devices
Intel Corporation
0 cites
US116997562023
Source/drain Diffusion Barrier for Germanium Nmos Transistors
Intel Corporation
0 cites
US116950812023
Channel Layer Formation for III-V Metal-oxide-semiconductor Field Effect Transistors (mosfets)
Intel Corporation
0 cites
US116902112023
Thin Film Transistor Based Memory Cells on Both Sides of a Layer of Logic Devices
Intel Corporation
0 cites
US116902152023
Self-aligned Bitline and Capacitor via Formation
Intel Corporation
0 cites
US116887802023
Deep Source and Drain for Transistor Structures with Back-side Contact Metallization
Intel Corporation
0 cites
US116827312023
Fin Smoothing and Integrated Circuit Structures Resulting Therefrom
Intel Corporation
0 cites
US116839292023
Method for Making Memory Cells Based on Thin-film Transistors
Intel Corporation
0 cites
US116769652023
Strained Tunable Nanowire Structures and Process
Intel Corporation
0 cites
US116706822023
FINFET Transistor Having a Doped Sub Fin Structure to Reduce Channel to Substrate Leakage
Tahoe Research, Ltd.
0 cites
US116582222023
Thin Film Transistor with Charge Trap Layer
Intel Corporation
0 cites
US116520472023
Intermediate Separation Layers at the Back-end-of-line
Intel Corporation
0 cites
US116463592023
Fin Cut and Fin Trim Isolation for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US116409882023
Confined Epitaxial Regions for Semiconductor Devices and Methods of Fabricating Semiconductor Devices Having Confined Epitaxial Regions
Intel Corporation
0 cites
US116409852023
Trench Isolation for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US116371852023
Contact Stacks to Reduce Hydrogen in Semiconductor Devices
Intel Corporation
0 cites
US116316732023
Non-planar Semiconductor Device Having Doped Sub-fin Region and Method to Fabricate Same
Tahoe Research, Ltd.
0 cites
US116317372023
Ingaas Epi Structure and Wet Etch Process for Enabling Iii-v GAA in Art Trench
Intel Corporation
0 cites
US116213542023
Integrated Circuit Structures Having Partitioned Source or Drain Contact Structures
Intel Corporation
0 cites
US116160152023
Integrated Circuit Device with Back-side Interconnection to Deep Source/drain Semiconductor
Intel Corporation
0 cites
US116108942023
Capacitor Separations in Dielectric Layers
Intel Corporation
0 cites
US116005242023
Self-aligned Contacts
Intel Corporation
0 cites
US115946372023
Gate-all-around Integrated Circuit Structures Having Fin Stack Isolation
Intel Corporation
0 cites
US115880522023
Sub-fin Isolation Schemes for Gate-all-around Transistor Devices
Intel Corporation
0 cites
US115814202023
Contact Over Active Gate Structures for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
0 cites
US115814062023
Method of Fabricating CMOS Finfets by Selectively Etching a Strained Sige Layer
Daedalus Prime LLC
0 cites
US115813152023
Self-aligned Gate Edge Trigate and Finfet Devices
Intel Corporation
0 cites
US115750052023
Asymmetrical Semiconductor Nanowire Field-effect Transistor
Intel Corporation
0 cites
US115693702023
DEPOP Using Cyclic Selective Spacer Etch
Intel Corporation
0 cites
US115630812023
Self-aligned Gate Edge and Local Interconnect
Daedalus Prime LLC
0 cites
US115576582023
Transistors with High Density Channel Semiconductor Over Dielectric Material
Intel Corporation
0 cites
US115576762023
Device, Method and System to Provide a Stressed Channel of a Transistor
Intel Corporation
0 cites