18 Patents
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- US122726882025Selective Growth Self-aligned Gate Endcap (SAGE) Architectures Without Fin End Gap
Intel Corporation
0 cites - US122665362025Mid-processing Removal of Semiconductor Fins During Fabrication of Integrated Circuit Structures
Intel Corporation
0 cites - US122243262025Contact Architecture for Capacitance Reduction and Satisfactory Contact Resistance
Intel Corporation
0 cites - 0 cites
- US120274172024Source or Drain Structures with High Germanium Concentration Capping Layer
Intel Corporation
0 cites - US119845062024Field Effect Transistor Having a Gate Dielectric with a Dipole Layer and Having a Gate Stressor Layer
Intel Corporation
0 cites - US119089402024Field Effect Transistor with a Hybrid Gate Spacer Including a Low-k Dielectric Material
Intel Corporation
0 cites - 0 cites
- US118878602024Mid-processing Removal of Semiconductor Fins During Fabrication of Integrated Circuit Structures
Intel Corporation
0 cites - 0 cites
- US118548942023Integrated Circuit Device Structures and Double-sided Electrical Testing
Intel Corporation
0 cites - US118240972023Contact Architecture for Capacitance Reduction and Satisfactory Contact Resistance
Intel Corporation
0 cites - 0 cites
- US116409882023Confined Epitaxial Regions for Semiconductor Devices and Methods of Fabricating Semiconductor Devices Having Confined Epitaxial Regions
Intel Corporation
0 cites - US116056322023Unidirectional Self-aligned Gate Endcap (SAGE) Architectures with Gate-orthogonal Walls
Intel Corporation
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