Patents/Inventors

Steven C. Woo

Saratoga, CAUS45 patents

34 Patents

US126204312026
Refresh Management Selection
Rambus Inc.
0 cites
US126195342026
Interconnect Based Address Mapping for Improved Reliability
Rambus Inc.
0 cites
US126193672026
Block Copy
Rambus Inc.
0 cites
US126091512026
Address Mapping for Improved Reliability
Rambus Inc.
0 cites
US125915282026
Quad-channel Memory Module
Rambus Inc.
0 cites
US125473492026
Memory Module with Double Data Rate Command and Data Interfaces Supporting Two-channel and Four-channel Modes
Rambus Inc.
0 cites
US125360672026
Configurable In-array Event Tracking
Rambus Inc.
0 cites
US125361332026
Methods and Circuits for Streaming Data to Processing Elements in Stacked Processor-plus-memory Architecture
Rambus Inc.
0 cites
US124684412025
Memory Device Having Hidden Refresh
Rambus Inc.
0 cites
US124695292025
Buffer Device with Low-latency Skid Mode for Data Freshness
Rambus Inc.
0 cites
US124558242025
DRAM Cache with Stacked, Heterogenous Tag and Data Dies
Rambus Inc.
0 cites
US123996362025
Multi-modal Refresh of Dynamic, Random-access Memory
Rambus Inc.
0 cites
US123935312025
Quad-channel DRAM
Rambus Inc.
0 cites
US123533372025
Methods and Circuits for Aggregating Processing Units and Dynamically Allocating Memory
Rambus Inc.
0 cites
US123466042025
Stacked Device Communication
Rambus Inc.
0 cites
US122926012025
Bus Distribution Using Multiwavelength Multiplexing
Rambus Inc.
0 cites
US121747492024
Page Table Manager
Rambus Inc.
0 cites
US121364522024
Method and Apparatus for Calibrating Write Timing in a Memory System
Rambus Inc.
0 cites
US121255562024
Data Buffer for Memory Devices with Memory Address Remapping
Rambus Inc.
0 cites
US121243922024
Stacked Device System
Rambus Inc.
0 cites
US120864412024
Block Copy
Rambus Inc.
0 cites
US120860602024
Interconnect Based Address Mapping for Improved Reliability
Rambus Inc.
0 cites
US120016972024
Multi-modal Refresh of Dynamic, Random-access Memory
Rambus Inc.
0 cites
US119604382024
Methods and Circuits for Streaming Data to Processing Elements in Stacked Processor-plus-memory Architecture
Rambus Inc.
0 cites
US119346542024
Memory Device Having Hidden Refresh
Rambus Inc.
0 cites
US119342692024
Efficient Storage of Error Correcting Code Information
Cadence Design Systems, Inc.
0 cites
US119220662024
Stacked Device Communication
Rambus Inc.
0 cites
US119151362024
High-bandwidth Neural Network
Rambus Inc.
0 cites
US118417932023
Switch-based Free Memory Tracking in Data Center Environments
Rambus Inc.
0 cites
US117627872023
Quad-channel DRAM
Rambus Inc.
0 cites
US117555232023
Stacked Device System
Rambus Inc.
0 cites
US116824482023
Method and Apparatus for Calibrating Write Timing in a Memory System
Rambus Inc.
0 cites
US116452122023
Dynamic Processing Speed
Rambus Inc.
0 cites
US116098162023
Efficient Storage of Error Correcting Code Information
Rambus Inc.
0 cites