Patents/Inventors

Stephen M. Cea

Hillsboro, ORUS19 patents

19 Patents

US125751512026
Gate-all-around Integrated Circuit Structures Having Doped Subfin
Intel Corporation
0 cites
US123494202025
Device, Method and System to Provide a Stressed Channel of a Transistor
Intel Corporation
0 cites
US123100442025
Vertical Integration Scheme and Circuit Elements Architecture for Area Scaling of Semiconductor Devices
Intel Corporation
0 cites
US122438752025
Forksheet Transistors with Dielectric or Conductive Spine
Intel Corporation
0 cites
US121990982025
Fin Doping and Integrated Circuit Structures Resulting Therefrom
Intel Corporation
0 cites
US121991422025
Neighboring Gate-all-around Integrated Circuit Structures Having Conductive Contact Stressor Between Epitaxial Source or Drain Regions
Intel Corporation
0 cites
US121426342024
Silicon and Silicon Germanium Nanowire Structures
Sony Group Corporation
0 cites
US121259162024
Nanowire Structures Having Non-discrete Source and Drain Regions
Google LLC
0 cites
US121006232024
Vertically Stacked Finfets and Shared Gate Patterning
Intel Corporation
0 cites
US120682062024
Extension of Nanocomb Transistor Arrangements to Implement Gate All Around
Intel Corporation
0 cites
US120574912024
Self-aligned Gate Endcap (SAGE) Architectures with Gate-all-around Devices Above Insulator Substrates
Intel Corporation
0 cites
US119233702024
Forksheet Transistors with Dielectric or Conductive Spine
Intel Corporation
0 cites
US117570262023
Nanowire Structures Having Wrap-around Contacts
Google LLC
0 cites
US117055182023
Isolation Schemes for Gate-all-around Transistor Devices
Intel Corporation
0 cites
US116769652023
Strained Tunable Nanowire Structures and Process
Intel Corporation
0 cites
US116581832023
Metallization Structures Under a Semiconductor Device Layer
Intel Corporation
0 cites
US115814062023
Method of Fabricating CMOS Finfets by Selectively Etching a Strained Sige Layer
Daedalus Prime LLC
0 cites
US115576762023
Device, Method and System to Provide a Stressed Channel of a Transistor
Intel Corporation
0 cites
US115521972023
Nanowire Structures Having Non-discrete Source and Drain Regions
Google LLC
0 cites