Shyam Sunder Raghunathan

9 Patents

• US126145932026

  Managing Allocation of Blocks in a Memory Sub-system

  Micron Technology, Inc.

  0 cites
• US125974722026

  Selectively Erasing One of Multiple Erase Blocks Coupled to a Same String Using Gate Induced Drain Leakage

  Micron Technology, Inc.

  0 cites
• US125421882026

  Boost-by-deck During a Program Operation on a Memory Device

  Micron Technology, Inc.

  0 cites
• US125302882026

  Read Disturb Tracking Among Multiple Erase Blocks Coupled to a Same String

  Micron Technology, Inc.

  0 cites
• US125302872026

  Read Disturb Tracking Among Multiple Erase Blocks Coupled to a Same String

  Micron Technology, Inc.

  0 cites
• US122240162025

  Transient and Stable State Read Operations of a Memory Device

  Micron Technology, Inc.

  0 cites
• US122056532025

  Wordline or Pillar State Detection for Faster Read Access Times

  Micron Technology, Inc.

  0 cites
• US120873722024

  Partial Block Erase Operations in Memory Devices

  Micron Technology, Inc.

  0 cites
• US117627672023

  Storing Highly Read Data at Low Impact Read Disturb Pages of a Memory Device

  Micron Technology, Inc.

  0 cites