9 Patents
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- US125486952026Methods and Devices for High Resistance and Low Resistance Conductor Layers Mitigating Skin Depth Loss
Averatek Corporation
0 cites - US122132582025Method of Manufacture for Embedded IC Chip Directly Connected to PCB
Averatek Corporation
0 cites - US121502542024Method of Forming a Laminate Structure Having a Plated Through-hole Using a Removable Cover Layer
Sanmina Corporation
0 cites - US120637482024Catalyzed Metal Foil and Uses Thereof to Produce Electrical Circuits
Averatek Corporation
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- US117658272023Simultaneous and Selective Wide Gap Partitioning of via Structures Using Plating Resist
Sanmina Corporation
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