9 Patents
- US123408632025Stacked Memory Chip Solution with Reduced Package Inputs/outputs (i/os)
Intel Corporation
0 cites - 0 cites
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- US120873522024Techniques to Couple High Bandwidth Memory Device on Silicon Substrate and Package Substrate
Tahoe Research, Ltd.
0 cites - 0 cites
- US117766192023Techniques to Couple High Bandwidth Memory Device on Silicon Substrate and Package Substrate
Tahoe Research, Ltd.
0 cites - US116874042023Technologies for Preserving Error Correction Capability in Compute-in-memory Operations
Intel Corporation
0 cites - 0 cites
- US115573332023Techniques to Couple High Bandwidth Memory Device on Silicon Substrate and Package Substrate
Tahoe Research, Ltd.
0 cites