3 Patents
- US123270772025Deadlock Detection and Prevention for Routing Packet-switched Nets in Electronic Systems
Xilinx, Inc.
0 cites - US117339802023Application Implementation and Buffer Allocation for a Data Processing Engine Array
Xilinx, Inc.
0 cites - US117095212023Synchronous Clock Domain Crossing Skew Optimization and Multi-clock Buffer (MBUFG)
XILINX, Inc.
0 cites