Patents/Inventors

Sampath K. Ratnam

San Jose, CAUS54 patents

55 Patents

US124877522025
Multi-stage Erase Operation of Memory Cells in a Memory Sub-system
Micron Technology, Inc.
0 cites
US124511972025
Adaptive Integrity Scan Rates in a Memory Sub-system Based on Block Health Metrics
Micron Technology, Inc.
0 cites
US124512092025
Error Handling
Micron Technology, Inc.
0 cites
US124302432025
Using a Common Pool of Blocks for User Data and a System Data Structure
Micron Technology, Inc.
0 cites
US124242872025
Memory Read Voltage Threshold Tracking Based on Memory Device-originated Metrics Characterizing Voltage Distributions
Micron Technology, Inc.
0 cites
US123537532025
Diagonal Page Mapping in Memory Systems
Micron Technology, Inc.
0 cites
US122290002025
Managing Error-handling Flows in Memory Devices
Micron Technology, Inc.
0 cites
US122165732025
Memory Device with Dynamic Cache Management
Micron Technology, Inc.
0 cites
US121647832024
Cross-temperature Compensation Based on Media Endurance in Memory Devices
Micron Technology, Inc.
0 cites
US121310202024
Memory Devices and Systems Including Static and Dynamic Caches, and Related Methods
Micron Technology, Inc.
0 cites
US120571852024
Voltage Calibration Scans to Reduce Memory Device Overhead
Micron Technology, Inc.
0 cites
US120078382024
Accessing Data Using Error Correction Operation(s) to Reduce Latency at a Memory Sub-system
Micron Technology, Inc.
0 cites
US119841742024
Accelerating Configuration Updates for Memory Devices
Micron Technology, Inc.
0 cites
US119421602024
Performing a Program Operation Based on a High Voltage Pulse to Securely Erase Data
Micron Technology, Inc.
0 cites
US119283472024
Managing Voltage Bin Selection for Blocks of a Memory Device
Micron Technology, Inc.
0 cites
US119230302024
Optimized Storage Charge Loss Management
Micron Technology, Inc.
0 cites
US118999662024
Implementing Fault Tolerant Page Stripes on Low Density Memory Systems
Micron Technology, Inc.
0 cites
US118682022024
Granular Error Reporting on Multi-pass Programming of Non-volatile Memory
Micron Technology, Inc.
0 cites
US118686392024
Providing Recovered Data to a New Memory Cell at a Memory Sub-system Based on an Unsuccessful Error Correction Operation
MICRON TECHNOLOGY, Inc.
0 cites
US118696052024
Adjusting Pass-through Voltage Based on Threshold Voltage Shift
Micron Technology, Inc.
0 cites
US118532052023
Memory Device with Dynamic Cache Management
Micron Technology, Inc.
0 cites
US118363922023
Relocating Data to Low Latency Memory
Micron Technology, Inc.
0 cites
US118373072023
Managing Error-handling Flows in Memory Devices
Micron Technology, Inc.
0 cites
US118292902023
Garbage Collection Candidate Selection Using Block Overwrite Rate
Micron Technology, Inc.
0 cites
US118237222023
Determining Voltage Offsets for Memory Read Operations
MICRON TECHNOLOGY, Inc.
0 cites
US118106272023
Selective Read Disturb Sampling
Micron Technology, Inc.
0 cites
US117973832023
Redundant Array of Independent NAND for a Three-dimensional Memory Array
Micron Technology, Inc.
0 cites
US117974412023
Cache Media Management
Micron Technology, Inc.
0 cites
US117898622023
Power-on-time Based Data Relocation
Micron Technology, Inc.
0 cites
US117828472023
Performing a Media Management Operation Based on a Sequence Identifier for a Block
Micron Technology, Inc.
0 cites
US117554722023
Periodic Flush in Memory Component That Is Using Greedy Garbage Collection
Micron Technology, Inc.
0 cites
US117480132023
Grouping Blocks Based on Power Cycle and Power on Time
Micron Technology, Inc.
0 cites
US117268742023
Storing Critical Data at a Memory System
Micron Technology, Inc.
0 cites
US117202862023
Extended Cross-temperature Handling in a Memory Sub-system
Micron Technology, Inc.
0 cites
US117204932023
Cache Management Based on Memory Device Over-provisioning
Micron Technology, Inc.
0 cites
US117214042023
Operation of Mixed Mode Blocks
Micron Technology, Inc.
0 cites
US117147102023
Providing Data of a Memory System Based on an Adjustable Error Rate
Micron Technology, Inc.
0 cites
US117155312023
Open Block Management Using Storage Charge Loss Margin Checking
Micron Technology, Inc.
0 cites
US117155412023
Workload Adaptive Scans for Memory Sub-systems
Micron Technology, Inc.
0 cites
US117097272023
Managing Error-handling Flows in Memory Devices
Micron Technology, Inc.
0 cites
US117105272023
Mitigating a Voltage Condition of a Memory Cell in a Memory Sub-system
Micron Technology, Inc.
0 cites
US117041792023
Regression-based Calibration and Scanning of Data Units
Micron Technology, Inc.
0 cites
US116937672023
Performing a Media Management Operation Based on Changing a Write Mode of a Data Block in a Cache
Micron Technology, Inc.
0 cites
US116874522023
Dynamic Program-verify Voltage Adjustment for Intra-block Storage Charge Loss Uniformity
Micron Technology, Inc.
0 cites
US116884832023
Managing Block Retirement for Temporary Operational Conditions
Micron Technology, Inc.
0 cites
US116755292023
Threshold Voltage Determination for Calibrating Voltage Bins of a Memory Device
Micron Technology, Inc.
0 cites
US116766642023
Voltage Bin Selection for Blocks of a Memory Device After Power Up of the Memory Device
Micron Technology, Inc.
0 cites
US116627862023
Temperature Compensation in a Memory System
Micron Technology, Inc.
0 cites
US116449792023
Selective Accelerated Sampling of Failure- Sensitive Memory Pages
Micron Technology, Inc.
0 cites
US115930052023
Managing Voltage Bin Selection for Blocks of a Memory Device
Micron Technology, Inc.
0 cites
US115932612023
Memory Device with Dynamic Cache Management
Micron Technology, Inc.
0 cites
US115863572023
Memory Management
Micron Technology, Inc.
0 cites
US115876272023
Determining Voltage Offsets for Memory Read Operations
Micron Technology, Inc.
0 cites
US115876392023
Voltage Calibration Scans to Reduce Memory Device Overhead
Micron Technology, Inc.
0 cites
US115441882023
Memory Device with Dynamic Storage Mode Control
Micron Technology, Inc.
0 cites