3 Patents
- US120336872024Computer Memory Systems Employing Localized Generation of Global Bit Line (GBL) Clock Signal to Reduce Clock Signal Read Path Divergence for Improved Signal Tracking, and Related Methods
Microsoft Technology Licensing, LLC
0 cites - US119486242024Memory Bit Cell Array Including Contention-free Column Reset Circuit, and Related Methods
Microsoft Technology Licensing, LLC
0 cites - US115810362023Searchable Array Circuits with Load-matched Signals for Reduced Hit Signal Timing Margins and Related Methods
Microsoft Technology Licensing, LLC
0 cites