Patents/Inventors

Ryan Keech

Portland, ORUS12 patents

14 Patents

US123880112025
Top Gate Recessed Channel CMOS Thin Film Transistor and Methods of Fabrication
Intel Corporation
0 cites
US123425742025
Contact Resistance Reduction in Transistor Devices with Metallization on Both Sides
Intel Corporation
0 cites
US123426112025
Source or Drain Structures with Vertical Trenches
Intel Corporation
0 cites
US122888082025
High Aspect Ratio Source or Drain Structures with Abrupt Dopant Profile
Intel Corporation
0 cites
US122665702025
Self-aligned Interconnect Structures and Methods of Fabrication
Intel Corporation
0 cites
US121193872024
Low Resistance Approaches for Fabricating Contacts and the Resulting Structures
Intel Corporation
0 cites
US120948812024
Arsenic-doped Epitaxial Source/drain Regions for NMOS
Intel Corporation
0 cites
US119964042024
Three-dimensional Integrated Circuits (3dics) Including Bottom Gate MOS Transistors with Monocrystalline Channel Material
Intel Corporation
0 cites
US119731432024
Source or Drain Structures for Germanium N-channel Devices
Intel Corporation
0 cites
US119358872024
Source or Drain Structures with Vertical Trenches
Intel Corporation
0 cites
US119293202024
Top Gate Recessed Channel CMOS Thin Film Transistor in the Back End of Line and Methods of Fabrication
Intel Corporation
0 cites
US118045232023
High Aspect Ratio Source or Drain Structures with Abrupt Dopant Profile
Intel Corporation
0 cites
US116108892023
Arsenic-doped Epitaxial, Source/drain Regions for NMOS
Intel Corporation
0 cites
US115521692023
Source or Drain Structures with Phosphorous and Arsenic Co-dopants
Intel Corporation
0 cites