Patents/Inventors

Robert A. May

BurnabyCA20 patents

19 Patents

US125742882026
Systems and Methods for SD-WAN Setup Automation
Fortinet, Inc.
0 cites
US125744132026
Systems and Methods for Implementing a Family Policy Using a Cooperative Security Fabric
Fortinet, Inc.
0 cites
US124769372025
Systems and Methods for Cloud Based Root Service Application Across Multiple Cooperative Security Fabrics
Fortinet, Inc.
0 cites
US124321232025
Systems and Methods for Automated Incident Management
Fortinet, Inc.
0 cites
US122180692025
Multi-chip Package with High Density Interconnects
Intel Corporation
0 cites
US122180712025
Panel Level Packaging for Multi-die Products Interconnected with Very High Density (VHD) Interconnect Layers
Intel Corporation
0 cites
US121495402024
Systems and Methods for Identifying Security Requirements in a ZTNA System
Fortinet, Inc.
0 cites
US121012312024
Systems and Methods for Automated Incident Management
Fortinet, Inc.
0 cites
US120814002024
Systems and Methods for SD-WAN Setup Automation
Fortinet, Inc.
0 cites
US120691872024
Systems and Methods for Posture Checking Across Local Network Zone ZTNA Control
Fortinet, Inc.
0 cites
US119088022024
Multi-chip Package with High Density Interconnects
Intel Corporation
0 cites
US119088212024
Sacrificial Dielectric for Lithographic via Formation to Enable via Scaling in High Density Interconnect Packaging
Intel Corporation
0 cites
US119098262024
Systems and Methods for Four Dimensional Network Session Authorization
Fortinet, Inc.
0 cites
US118625522024
Methods of Embedding Magnetic Structures in Substrates
Intel Corporation
0 cites
US117704032023
Determination of a Security Rating of a Network Element
Fortinet, Inc.
0 cites
US117355312023
Panel Level Packaging for Multi-die Products Interconnected with Very High Density (VHD) Interconnect Layers
Intel Corporation
0 cites
US117216312023
Via Structures Having Tapered Profiles for Embedded Interconnect Bridge Substrates
Intel Corporation
0 cites
US115748742023
Package Architecture Utilizing Photoimageable Dielectric (PID) for Reduced Bump Pitch
Intel Corporation
0 cites
US115520102023
Dielectric for High Density Substrate Interconnects
Intel Corporation
0 cites