3 Patents
- US125421872026Apparatus and Method to Improve Read Window Budget in a Three Dimensional NAND Memory
Intel NDTM US LLC
0 cites - US123620022025Staggered Read Recovery for Improved Read Window Budget in a Three Dimensional (3D) NAND Memory Array
Intel NDTM US LLC
0 cites - US121068152024Variable Error Correction Codeword Packing to Support Bit Error Rate Targets
Intel Coproration
0 cites