Patents/Inventors

Pulkit Khandelwal

Cupertino, CAUS9 patents

9 Patents

US125426462026
Configurable-aggregation Retimer with Lane-dedicated Controllers
Astera Labs, Inc.
0 cites
US124895902025
Retimer with Path-coordinated Flow-rate Compensation
Astera Labs, Inc.
0 cites
US123271352025
Retimer with Host-interactive Data Logging Engine
Astera Labs, Inc.
0 cites
US122770022025
Low-latency Retimer with Seamless Clock Switchover
Astera Labs, Inc.
0 cites
US121432882024
Low-latency Signaling-link Retimer
Astera Labs, Inc.
0 cites
US120036102024
Retimer with Mesochronous Intra-lane Path Controllers
Astera Labs, Inc.
0 cites
US119496292024
Retimer with Path-coordinated Flow-rate Compensation
Astera Labs, Inc.
0 cites
US119414362024
Retimer with Host-interactive Data Logging Engine
Astera Labs, Inc.
0 cites
US118531152023
Low-latency Retimer with Seamless Clock Switchover
Astera Labs, Inc.
0 cites