Patents/Inventors

Pouya Najafi Ashtiani

TorontoCA8 patents

8 Patents

US125853872026
Clock Domain Phase Adjustment for Memory Operations
ATI Technologies ULC
0 cites
US124616812025
Fine-grained Clocking and Clock Distribution in Low Power Double Data Rate Physical Layer Interface
ATI Technologies ULC
0 cites
US124378272025
DRAM Specific Interface Calibration via Programmable Training Sequences
Advanced Micro Devices, Inc.
0 cites
US124230192025
Read Gate Training and Tracking
ATI Technologies ULC
0 cites
US120794902024
Reducing Power Consumption Associated with Frequency Transitioning in a Memory Interface
Advanced Micro Devices, Inc.
0 cites
US119890502024
Multi-chiplet Clock Delay Compensation
Advanced Micro Devices, Inc.
0 cites
US119478332024
Method and Apparatus for Training Memory
Advanced Micro Devices, Inc.
0 cites
US118758752024
Variable Tick for DRAM Interface Calibration
Advanced Micro Devices, Inc.
0 cites