Patents/Inventors

Patrick R. Khayat

San Diego, CAUS38 patents

30 Patents

US126204472026
Adaptive Temperature Compensation for a Memory Device
Micron Technology, Inc.
0 cites
US125375422026
Error-handling with Multiple Levels of Decoders
MICRON TECHNOLOGY, Inc.
0 cites
US125058882025
Memory Device Producing Metadata Characterizing Applied Read Voltage Level with Respect to Voltage Distributions
Micron Technology Inc.
0 cites
US124565022025
Generating Semi-soft Bit Data During Corrective Read Operations in Memory Devices
Micron Technology, Inc.
0 cites
US124511972025
Adaptive Integrity Scan Rates in a Memory Sub-system Based on Block Health Metrics
Micron Technology, Inc.
0 cites
US124312022025
Memory Read Calibration Based on Memory Device-originated Metrics Characterizing Voltage Distributions
Micron Technology, Inc.
0 cites
US124302062025
Temperature Sensor Management During Error Handling Operations in a Memory Sub-system
Micron Technology, Inc.
0 cites
US124242872025
Memory Read Voltage Threshold Tracking Based on Memory Device-originated Metrics Characterizing Voltage Distributions
Micron Technology, Inc.
0 cites
US124126322025
Managing Compensation for Charge Coupling and Lateral Migration in Memory Devices
Micron Technology, Inc.
0 cites
US123731092025
Validating Read Level Voltage in Memory Devices
Micron Technology, Inc.
0 cites
US123270482025
Using Duplicate Data for Improving Error Correction Capability
Micron Technology, Inc.
0 cites
US122664202025
Temperature-compensated Time Estimate for a Block to Reach a Uniform Charge Loss State
Micron Technology, Inc.
0 cites
US122231902025
Measurement of Representative Charge Loss in a Block to Determine Charge Loss State
Micron Technology, Inc.
0 cites
US121977422025
Managing Error Compensation Using Charge Coupling and Lateral Migration Sensitivity
Micron Technology, Inc.
0 cites
US121190622024
Managing Compensation for Cell-to-cell Coupling and Lateral Migration in Memory Devices Based on a Sensitivity Metric
Micron Technology, Inc.
0 cites
US121059612024
Copyback Clear Command for Performing a Scan and Read in a Memory Device
Micron Technology, Inc.
0 cites
US120873742024
Managing Compensation for Cell-to-cell Coupling and Lateral Migration in Memory Devices Using Segmentation
Micron Technology, Inc.
0 cites
US120738912024
Integrated Command to Calibrate Read Voltage Level
Micron Technology, Inc.
0 cites
US120727622024
Error-handling Management During Copyback Operations in Memory Devices
Micron Technology, Inc.
0 cites
US120672902024
On-die Cross-temperature Management for a Memory Device
Micron Technology, Inc.
0 cites
US120463072024
Managing Program Verify Voltage Offsets for Charge Coupling and Lateral Migration Compensation in Memory Devices
Micron Technology, Inc.
0 cites
US120462982024
Managing Compensation for Charge Coupling and Lateral Migration in Memory Devices
Micron Technology, Inc.
0 cites
US120400252024
Two-sided Page Scans with Calibration Feedback
Micron Technology, Inc.
0 cites
US120324442024
Error Correction with Syndrome Computation in a Memory Device
MICRON TECHNOLOGY, Inc.
0 cites
US120078382024
Accessing Data Using Error Correction Operation(s) to Reduce Latency at a Memory Sub-system
Micron Technology, Inc.
0 cites
US118612332024
Using Duplicate Data for Improving Error Correction Capability
Micron Technology, Inc.
0 cites
US118546492023
Temperature-compensated Time Estimate for a Block to Reach a Uniform Charge Loss State
Micron Technology, Inc.
0 cites
US117972052023
Measurement of Representative Charge Loss in a Block to Determine Charge Loss State
Micron Technology, Inc.
0 cites
US117147102023
Providing Data of a Memory System Based on an Adjustable Error Rate
Micron Technology, Inc.
0 cites
US117097342023
Error Correction with Syndrome Computation in a Memory Device
MICRON TECHNOLOGY, Inc.
0 cites