Paras Mal Jain

4 Patents

• US124818122025

  Multi-machine Version Independent Hierarchical Verification

  Synopsys, Inc.

  0 cites
• US124752312025

  Hardware Security Checks in Static Verification of Integrated Circuit Designs

  SYNOPSYS, Inc.

  0 cites
• US120262022024

  Memory Optimization for Storing Objects in Nested Hash Maps Used in Electronic Design Automation Systems

  Synopsys, Inc.

  0 cites
• US119076312024

  Reset Domain Crossing Detection and Simulation

  Synopsys, Inc.

  0 cites