20 Patents
- US125917272026Lane Repair and Lane Reversal Implementation for Die-to-die (D2D) Interconnects
Intel Corporation
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- US125050652025On-package Die-to-die (D2D) Interconnect for Memory Using Universal Chiplet Interconnect Express (ucie) PHY
Intel Corporation
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- US124059122025Link Initialization Training and Bring Up for Die-to-die Interconnect
Intel Corporation
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- US123478182025Logic Die in a Multi-chip Package Having a Configurable Physical Interface to On-package Memory
Intel Corporation
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- US121819662024Reduction of Latency Impact of On-die Error Checking and Correction (ECC)
Intel Corporation
0 cites - US121179602024Approximate Data Bus Inversion Technique for Latency Sensitive Applications
Intel Corporation
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- US119543602024Technology to Provide Accurate Training and Per-bit Deskew Capability for High Bandwidth Memory Input/output Links
Intel Corporation
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