8 Patents
- US125882482026Template for Nanosheet Source Drain Formation with Bottom Dielectric
Applied Materials, Inc.
0 cites - US124023512025Gate All Around Device with Fully-depleted Silicon-on-insulator
Applied Materials, Inc.
0 cites - 0 cites
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- US121837982024Threshold Voltage Modulation for Gate-all-around FET Architecture
Applied Materials, Inc.
0 cites - 0 cites
- US116328142023Method for Providing Accessibility Feature and Electronic Device for Performing Same
SAMSUNG ELECTRONICS CO., Ltd.
0 cites