17 Patents
- US125989772026Fill of Vias in Single and Dual Damascene Structures Using Self-assembled Monolayer
Intel Corporation
0 cites - US125139842025Double-sided Integrated Circuit Transistor Structures with Depopulated Bottom Channel Regions
Intel Corporation
0 cites - US125060592025Vertically Spaced Intra-level Interconnect Line Metallization for Integrated Circuit Devices
Intel Corporation
0 cites - US125060752025Epitaxial Source/drain Back-side Device Contact Structures with Wrap Around Metallization and Protective Conformal Liner
Intel Corporation
0 cites - US124263422025Low Germanium, High Boron Silicon Rich Capping Layer for PMOS Contact Resistance Thermal Stability
Intel Corporation
0 cites - 0 cites
- US123425742025Contact Resistance Reduction in Transistor Devices with Metallization on Both Sides
Intel Corporation
0 cites - 0 cites
- US123157942025Skip Level Vias in Metallization Layers for Integrated Circuit Devices
Intel Corporation
0 cites - US122887462025Skip Level Vias in Metallization Layers for Integrated Circuit Devices
Intel Corporation
0 cites - 0 cites
- US121991432025Gate-all-around Integrated Circuit Structures Having Removed Substrate
Intel Corporation
0 cites - 0 cites
- US119859092024Fabrication of Stackable Embedded Edram Using a Binary Alloy Based on Antimony
Intel Corporation
0 cites - US119488742024Vertically Spaced Intra-level Interconnect Line Metallization for Integrated Circuit Devices
Intel Corporation
0 cites - 0 cites
- 0 cites