12 Patents
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- US123549782025Coupled Loop and Void Structure Integrated in a Redistribution Layer of a Chip Package
XILINX, Inc.
0 cites - US123550002025Package Comprising a Substrate and a High-density Interconnect Integrated Device
QUALCOMM INCORPORATED
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- US117841572023Package Comprising Integrated Devices Coupled Through a Metallization Layer
QUALCOMM INCORPORATED
0 cites - US116769222023Integrated Device Comprising Interconnect Structures Having an Inner Interconnect, a Dielectric Layer and a Conductive Layer
QUALCOMM INCORPORATED
0 cites - US116055942023Package Comprising a Substrate and a High-density Interconnect Integrated Device Coupled to the Substrate
QUALCOMM INCORPORATED
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