Patents/Inventors

Lakshminarayanan Striramassarma

El Dorado Hills, CAUS36 patents

34 Patents

US125790722026
Graphics Processor Register File Including a Low Energy Portion and a High Capacity Portion
Intel Corporation
0 cites
US125546742026
Multi-tile Memory Management
Intel Corporation
0 cites
US123867792025
Dynamic Memory Reconfiguration
Intel Corporation
0 cites
US123067712025
Efficient Data Sharing for Graphics Data Processing Operations
INTEL CORPORATION
0 cites
US122934312025
Sparse Optimizations for a Matrix Accelerator Architecture
Intel Corporation
0 cites
US122104772025
Systems and Methods for Improving Cache Efficiency and Utilization
Intel Corporation
0 cites
US122044872025
Graphics Processor Data Access and Sharing
INTEL CORPORATION
0 cites
US121820352024
Systems and Methods for Cache Optimization
Intel Corporation
0 cites
US121820622024
Multi-tile Memory Management
Intel Corporation
0 cites
US121535412024
Cache Structure and Utilization
INTEL CORPORATION
0 cites
US121410942024
Systolic Disaggregation Within a Matrix Accelerator Architecture
Intel Corporation
0 cites
US121418902024
Enabling Product Skus Based on Chiplet Configurations
Intel Corporation
0 cites
US121243832024
Systems and Methods for Cache Optimization
Intel Corporation
0 cites
US121123982024
Disaggregation of System-on-chip (SOC) Architecture
Intel Corporation
0 cites
US120994612024
Multi-tile Memory Management
INTEL CORPORATION
0 cites
US120940482024
Multi-tile Graphics Processor Rendering
INTEL CORPORATION
0 cites
US120669752024
Cache Structure and Utilization
INTEL CORPORATION
0 cites
US120560592024
Systems and Methods for Cache Optimization
Intel Corporation
0 cites
US120567892024
Disaggregation of System-on-chip (SOC) Architecture
Intel Corporation
0 cites
US120324962024
Efficient Data Sharing for Graphics Data Processing Operations
INTEL CORPORATION
0 cites
US120138082024
Multi-tile Architecture for Graphics Operations
INTEL CORPORATION
0 cites
US119950292024
Multi-tile Memory Management for Detecting Cross Tile Access Providing Multi-tile Inference Scaling and Providing Page Migration
Intel Corporation
0 cites
US119540622024
Dynamic Memory Reconfiguration
Intel Corporation
0 cites
US119343422024
Assistance for Hardware Prefetch in Cache Access
INTEL CORPORATION
0 cites
US119085422024
Energy Efficient Memory Array with Optimized Burst Read and Write Data Access
Intel Corporation
0 cites
US118929502024
Data Prefetching for Graphics Data Processing
INTEL CORPORATION
0 cites
US118682642024
Sector Cache for Compression
Intel Corporation
0 cites
US117634162023
Disaggregation of System-on-chip (SOC) Architecture
Intel Corporation
0 cites
US117555012023
Efficient Data Sharing for Graphics Data Processing Operations
INTEL CORPORATION
0 cites
US117561502023
Disaggregation of System-on-chip (SOC) Architecture
Intel Corporation
0 cites
US116762392023
Sparse Optimizations for a Matrix Accelerator Architecture
Intel Corporation
0 cites
US116202562023
Systems and Methods for Improving Cache Efficiency and Utilization
Intel Corporation
0 cites
US115932692023
Sector Cache for Compression
Intel Corporation
0 cites
US115865482023
Sector Cache for Compression
Intel Corporation
0 cites