Patents/Inventors

Kyeong Rok Shin

GwangjuKR1 patent

2 Patents

US122059042025
Wafer-level Design and Wiring Pattern for a Semiconductor Package
Nepes Co., Ltd.
0 cites
US121989972025
Semiconductor Package Comprising First Molding Layer and Second Molding Layer with Different Thermal Expansion Coefficients
NEPES CO., Ltd.
0 cites