16 Patents
- US126108032026Semiconductor Device Structure with Reduced Critical Dimension and Method for Preparing the Same
NANYA TECHNOLOGY CORPORATION
0 cites - US125936762026Semiconductor Device with Metal Spacers and Method for Fabricating the Same
NANYA TECHNOLOGY CORPORATION
0 cites - US123476802025Method for Preparing Semiconductor Device Structure Having Features of Different Depths
NANYA TECHNOLOGY CORPORATION
0 cites - US123157252025Method for Preparing Semiconductor Device Structure Having Features of Different Depths
NANYA TECHNOLOGY CORPORATION
0 cites - US123082902025Method for Preparing Semiconductor Device Structure with Fluorine-catching Layer
NANYA TECHNOLOGY CORPORATION
0 cites - US123083192025Semiconductor Device Structure with Fluorine-catching Layer
NANYA TECHNOLOGY CORPORATION
0 cites - US122565652025Method for Preparing Recessed Gate Structure with Protection Layer
NANYA TECHNOLOGY CORPORATION
0 cites - US122180532025Semiconductor Device with Metal Spacers and Method for Fabricating the Same
NANYA TECHNOLOGY CORPORATION
0 cites - US122119052025Method for Preparing Recessed Gate Structure with Protection Layer
NANYA TECHNOLOGY CORPORATION
0 cites - US121547882024Method for Preparing Semiconductor Device Structure Having Features of Different Depths
NANYA TECHNOLOGY CORPORATION
0 cites - 0 cites
- 0 cites
- US119358502024Method for Fabricating Semiconductor Device with Slanted Conductive Layers
NANYA TECHNOLOGY CORPORATION
0 cites - US117769122023Method for Preparing Semiconductor Device Structure with Manganese-containing Lining Layer
NANYA TECHNOLOGY CORPORATION
0 cites - US117568852023Method for Fabricating Semiconductor Device with Metal Spacers
NANYA TECHNOLOGY CORPORATION
0 cites - US116383752023Method for Preparing Semiconductor Memory Device with Air Gaps for Reducing Capacitive Coupling
NANYA TECHNOLOGY CORPORATION
0 cites