Kuan-hsiang Mao

9 Patents

• US125885382026

  Semiconductor Device Having Wired Under Bump Structure and Method Therefor

  NXP B.V.

  0 cites
• US124944482025

  Ubm-free Metal Skeleton Frame with Support Studs and Method for Fabrication Thereof

  NXP B.V.

  0 cites
• US124069512025

  Redistribution Layer Having a Sideview Zig-zag Profile

  NXP B.V.

  0 cites
• US123879852025

  Semiconductor Device with Cavity Carrier and Method Therefor

  NXP B.V.

  0 cites
• US122887702025

  Semiconductor Packages with Embedded Wiring on Re-distributed Bumps

  NXP B.V.

  0 cites
• US121989982025

  Dielectric Sidewall Protection and Sealing for Semiconductor Devices in a in Wafer Level Packaging Process

  NXP B.V.

  0 cites
• US120806012024

  Packaged Semiconductor Devices and Methods Therefor

  NXP B.V.

  0 cites
• US119357532024

  Backside and Sidewall Metallization of Semiconductor Devices

  NXP B.V

  0 cites
• US116409472023

  Pre-resist Island Forming via Method and Apparatus

  NXP B.V.

  0 cites