36 Patents
- US126047862026Method of Atomic Diffusion Hybrid Bonding and Apparatus Made from Same
Intel Corporation
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- US125819682026Package Architecture of Large Dies Using Quasi-monolithic Chip Layers
Intel Corporation
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- US124696302025Inductor and Transformer Semiconductor Devices Using Hybrid Bonding Technology
Intel Corporation
0 cites - US124631802025Monolithic Chip Stacking Using a Die with Double-sided Interconnect Layers
Intel Corporation
0 cites - US124567022025Device, Method and System to Mitigate Stress on Hybrid Bonds in a Multi-tier Arrangement of Chiplets
Intel Corporation
0 cites - US124179782025Microelectronic Assemblies Having Backside Die-to-package Interconnects
Intel Corporation
0 cites - US124069562025Bilayer Memory Stacking with Computer Logic Circuits Shared Between Bottom and Top Memory Layers
Intel Corporation
0 cites - US123750602025Digitally Controlled Lithographically-defined Multi-frequency Acoustic Resonators
Intel Corporation
0 cites - US123623252025Monolithic Chip Stacking Using a Die with Double-sided Interconnect Layers
Intel Corporation
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- US122888102025Backside Contact Structures and Fabrication for Metal on Both Sides of Devices
Intel Corporation
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- US122666822025Capacitors and Resistors at Direct Bonding Interfaces in Microelectronic Assemblies
Intel Corporation
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- US121007612024Wrap-around Source/drain Method of Making Contacts for Backside Metals
Intel Corporation
0 cites - US121007622024Wrap-around Source/drain Method of Making Contacts for Backside Metals
Intel Corporation
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- US119964042024Three-dimensional Integrated Circuits (3dics) Including Bottom Gate MOS Transistors with Monocrystalline Channel Material
Intel Corporation
0 cites - US119359332024Backside Contact Structures and Fabrication for Metal on Both Sides of Devices
Intel Corporation
0 cites - US118698942024Metallization Structures for Stacked Device Connectivity and Their Methods of Fabrication
Intel Corporation
0 cites - US118548942023Integrated Circuit Device Structures and Double-sided Electrical Testing
Intel Corporation
0 cites - US117841652023Monolithic Chip Stacking Using a Die with Double-sided Interconnect Layers
Intel Corporation
0 cites - 0 cites
- US116769662023Stacked Transistors Having Device Strata with Different Channel Widths
Intel Corporation
0 cites - US116582212023Backside Contact Structures and Fabrication for Metal on Both Sides of Devices
Intel Corporation
0 cites - US116409612023III-V Source/drain in Top NMOS Transistors for Low Temperature Stacked Transistor Contacts
Intel Corporation
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- US115944522023Techniques for Revealing a Backside of an Integrated Circuit Device, and Associated Configurations
Intel Corporation
0 cites - US115945242023Fabrication and Use of Through Silicon Vias on Double Sided Interconnect Device
Intel Corporation
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- US115521042023Stacked Transistors with Dielectric Between Channels of Different Device Strata
Intel Corporation
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