13 Patents
- US125291412026Methods of Forming Transistor Interconnects on Top of a Semiconductor Device Substrate
Destination 2D Inc.
0 cites - US124697482025Cmos-compatible Graphene Structures, Interconnects and Fabrication Methods
The Regents Of The University Of California
0 cites - US124127572025Throughput Improvements for Low-temperature/beol-compatible Highly Scalable Graphene Synthesis Methods Including Processing in Retasked Tools
Destination 2D Inc.
0 cites - US123680612025Throughput Improvements for Low-temperature/beol-compatible Highly Scalable Graphene Synthesis Methods Including Processing in Retasked Tools
Destination 2D Inc.
0 cites - 0 cites
- US122867102025Methods of Low-temperature/beol-compatible Highly Scalable Graphene Synthesis
Destination 2D Inc.
0 cites - US122813882025Low-temperature/beol-compatible Highly Scalable Graphene Synthesis Tool
DESTINATION 2D Inc.
0 cites - 0 cites
- US119763692024Low-temperature/beol-compatible Highly Scalable Graphene Synthesis Tool
DESTINATION 2D Inc.
0 cites - US116311732023Pattern Recognition by Convolutional Neural Networks0 cites