Patents/Inventors

Karunakar Poosapalli

HyderabadIN25 patents

16 Patents

US126081962026
Diagnostics and Remediation for a Split-boot Architecture
Dell Products, L.P.
0 cites
US126022172026
Seamless Update Provisioning for Common Chipsets Carrying Different CPU Families
DELL PRODUCTS L.P.
0 cites
US123269392025
Security for a Split Boot Architecture
Dell Products, L.P.
0 cites
US123212352025
Telemetry Driven Platform Restoration for a Split Boot Architecture
Dell Products, L.P.
0 cites
US123067292025
Embedded Controller to Save System Telemetry Data During System Failures
Dell Products L.P.
0 cites
US122543222025
Virtual Pseudo Pcie (VVP) Device Nodes for Fast Reliable OS and Virtual Memory (VM) Boot
Dell Products L.P.
0 cites
US122357882025
Method and Apparatus for an Original Equipment Manufacturer Defined Scalable and Safe Memory Layout Firmware
DELL PRODUCTS LP
0 cites
US121591332024
Information Handling System with a Dynamic Basic Input/output System Configuration Map
Dell Procucts L.P.
0 cites
US120864362024
Option Read-only Memory Firmware-based Remediation
Dell Products L.P.
0 cites
US120619122024
Context-aware Thin-network Stack to Provide Rich Network Features in Split Boot Architecture
Dell Products L.P.
0 cites
US120560102024
System on a Chip-agnostic Dynamic Firmware Volumes for Basic Input/output Extension
Dell Products L.P.
0 cites
US120453262024
Secured Communication Protocol Layer for Authenticated Hardware Data Access
Dell Products L.P.
0 cites
US119777532024
BIOS NVRAM Storage Extension System and Method for Secure and Seamless Access for Various Boot Architectures
Dell Products, L.P.
0 cites
US119544982024
Dynamic Operation Code Based Agnostic Analysis of Initialization Information
Dell Products L.P.
0 cites
US119070712024
Storage Failover Protocol for Secure and Seamless Extended Firmware Load
Dell Products L.P.
0 cites
US117268802023
Fault Tolerance and Debug Analysis During a Boot Process
Dell Products L.P.
0 cites