11 Patents
- US125989322026Methods and Structures for Improving Etch Profile of Underlying Layers
Tokyo Electron Limited
0 cites - US125882622026Sacrificial Gate Capping Layer for Gate Protection During Source/drain Contact Opening
Tokyo Electron Limited
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- US125686772026Method of Self-aligned Dielectric Wall Formation for Forksheet Application
Tokyo Electron Limited
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- US122372162025Method for Filling Recessed Features in Semiconductor Devices with a Low-resistivity Metal
Tokyo Electron Limited
0 cites - US116886042023Method for Using Ultra Thin Ruthenium Metal Hard Mask for Etching Profile Control
Tokyo Electron Limited
0 cites - US116211902023Method for Filling Recessed Features in Semiconductor Devices with a Low-resistivity Metal
Tokyo Electron Limited
0 cites - US115944512023Platform and Method of Operating for Integrated End-to-end Fully Self-aligned Interconnect Process
Tokyo Electron Limited
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