Patents/Inventors

Jun Zhai

Cupertino, CAUS39 patents

36 Patents

US125884942026
Die Stitching and Harvesting of Arrayed Structures
Apple Inc.
0 cites
US125504122026
Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
Apple Inc.
0 cites
US125061172025
Wafer Level Integration of Passive Devices
Apple Inc.
0 cites
US124697652025
Thermally Enhanced Chip-on-wafer or Wafer-on-wafer Bonding
Apple Inc.
0 cites
US124566922025
Microelectronic Package RDL Patterns to Reduce Stress in Rdls Across Components
Apple Inc.
0 cites
US124514362025
Interconnecting a Plurality of Dies Having Spare Input/output Circuit
Apple Inc.
0 cites
US123681372025
High Bandwidth Die to Die Interconnect with Package Area Reduction
Apple Inc.
0 cites
US123227302025
Wafer Reconstitution and Die-stitching
Apple Inc.
0 cites
US122835492025
High Density Interconnection Using Fanout Interposer Chiplet
Apple Inc.
0 cites
US122611322025
Structure and Method for Sealing a Silicon IC
Apple Inc.
0 cites
US122495992025
Multiple Chip Module Trenched Lid and Low Coefficient of Thermal Expansion Stiffener Ring
Apple Inc.
0 cites
US121598352024
High Density 3D Interconnect Configuration
Apple Inc.
0 cites
US121348702024
Fluctuation Zone State Slope Protection System That Responds to Hydrological Changes
SOOCHOW UNIVERSITY
0 cites
US121192752024
Recessed Lid and Ring Designs and Lid Local Peripheral Reinforcement Designs
Apple Inc.
0 cites
US120876892024
Selectable Monolithic or External Scalable Die-to-die Interconnection System Methodology
Apple Inc.
0 cites
US120740772024
Flexible Package Architecture Concept in Fanout
Apple Inc.
0 cites
US120683242024
Multi-die Fine Grain Integrated Voltage Regulation
Apple Inc.
0 cites
US120339822024
Fully Interconnected Heterogeneous Multi-layer Reconstructed Silicon Device
Apple Inc.
0 cites
US120210352024
Interconnecting Dies by Stitch Routing
Apple Inc.
0 cites
US119669772024
Guarantee Fund Calculation with Allocation for Self-referencing Risk
Chicago Mercantile Exchange Inc.
0 cites
US119675282024
Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
Apple Inc.
0 cites
US119088192024
Semiconductor Packaging Substrate Fine Pitch Metal Bump and Reinforcement Structures
Apple Inc.
0 cites
US118625572024
Selectable Monolithic or External Scalable Die-to-die Interconnection System Methodology
Apple Inc.
0 cites
US118240152023
Structure and Method for Sealing a Silicon IC
Apple Inc.
0 cites
US117496312023
Electronic Package Including a Hybrid Thermal Interface Material and Low Temperature Solder Patterns to Improve Package Warpage and Reliability
Apple Inc.
0 cites
US117355262023
High Density 3D Interconnect Configuration
Apple Inc.
0 cites
US117355672023
Wafer Reconstitution and Die-stitching
Apple Inc.
0 cites
US117282662023
Die Stitching and Harvesting of Arrayed Structures
Apple Inc.
0 cites
US116999492023
Power Management System Switched Capacitor Voltage Regulator with Integrated Passive Device
Apple Inc.
0 cites
US116705482023
Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
Apple Inc.
0 cites
US116463022023
Multiple Chip Module Trenched Lid and Low Coefficient of Thermal Expansion Stiffener Ring
Apple Inc.
0 cites
US116257862023
Guarantee Fund Calculation with Allocation for Self-referencing Risk
Chicago Mercantile Exchange Inc.
0 cites
US115944942023
High Density Interconnection Using Fanout Interposer Chiplet
Apple Inc.
0 cites
US115879092023
High Bandwidth Die to Die Interconnect with Package Area Reduction
Apple Inc.
0 cites
US115611442023
Wearable Electronic Device with Fluid-based Pressure Sensing
APPLE Inc.
0 cites
US115454552023
Semiconductor Packaging Substrate Fine Pitch Metal Bump and Reinforcement Structures
Apple Inc.
0 cites