Patents/Inventors

Juan J. Noguera Serra

San Jose, CAUS22 patents

20 Patents

US125543102026
Power Reduction in an Array of Data Processing Engines
Advanced Micro Devices, Inc.
0 cites
US125550362026
Weight Sparsity in Data Processing Engines
XILINX, Inc.
0 cites
US125361322026
Data Processing Engine Tile Architecture for an Integrated Circuit
XILINX, Inc.
0 cites
US125050682025
Tiled Compute and Programmable Logic Array
XILINX, Inc.
0 cites
US124013642025
Multiple Partitions in a Data Processing Array
Xilinx, Inc.
0 cites
US122616032025
Adaptive Integrated Programmable Device Platform
Xilinx, Inc.
0 cites
US121644512024
Data Processing Array Interface Having Interface Tiles with Multiple Direct Memory Access Circuits
Xilinx, Inc.
0 cites
US121056672024
Device with Data Processing Engine Array That Enables Partial Reconfiguration
XILINX, Inc.
0 cites
US120674062024
Multiple Overlays for Use with a Data Processing Array
Xilinx, Inc.
0 cites
US120013672024
Multi-die Integrated Circuit with Data Processing Engine Array
Xilinx, Inc.
0 cites
US119721322024
Data Processing Engine Arrangement in a Device
Xilinx, Inc.
0 cites
US118532352023
Communicating Between Data Processing Engines Using Shared Memory
XILINX, Inc.
0 cites
US118486702023
Multiple Partitions in a Data Processing Array
Xilinx, Inc.
0 cites
US117303252023
Dual Mode Interconnect
XILINX, Inc.
0 cites
US116938082023
Multi-die Integrated Circuit with Data Processing Engine Array
Xilinx, Inc.
0 cites
US116830382023
Adaptive Integrated Programmable Device Platform
Xilinx, Inc.
0 cites
US116694642023
Multi-addressing Mode for DMA and Non-sequential Read and Write Patterns
XILINX, Inc.
0 cites
US115994982023
Device with Data Processing Engine Array That Enables Partial Reconfiguration
XILINX, Inc.
0 cites
US115737262023
Data Processing Engine Arrangement in a Device
Xilinx, Inc.
0 cites
US115678812023
Event-based Debug, Trace, and Profile in Device with Data Processing Engine Array
XILINX, Inc.
0 cites