Jorge E. Parra

4 Patents

• US125360182026

  Method and Apparatus for Performing Reduction Operations on a Plurality of Associated Data Element Values

  Intel Corporation

  0 cites
• US119005022024

  Compiler Assisted Register File Write Reduction

  Intel Corporation

  0 cites
• US116693292023

  Instructions and Logic for Vector Multiply Add with Zero Skipping

  Intel Corporation

  0 cites
• US116402972023

  Instruction and Logic for Systolic Dot Product with Accumulate

  Intel Corporation

  0 cites