John V. Lovelace

3 Patents

• US126031152026

  Method and Apparatus to Perform Training on a Data Bus Between a Dynamic Random Access Memory (DRAM) and a Data Buffer on a Buffered Dual In-line Memory Module

  Intel Corporation

  0 cites
• US125310982026

  Memory Module Based Data Buffer Communication Bus Training

  Intel Corporation

  0 cites
• US123216222025

  Deferred ECC (error Checking and Correction) Memory Initialization by Memory Scrub Hardware

  Intel Corporation

  0 cites