Patents/Inventors

Jodi Grzeskowiak

Schenectady, NYUS9 patents

9 Patents

US125640272026
Top-down Self-alignment of Vias in a Semiconductor Device for Sub-22nm Pitch Metals
Tokyo Electron Limited
0 cites
US124889892025
Method to Form Narrow Slot Contacts
Tokyo Electron Limited
0 cites
US124513542025
Double Patterning Method of Patterning a Substrate
TOKYO ELECTRON LIMITED
0 cites
US120992992024
Method of Patterning a Substrate Using a Sidewall Spacer Etch Mask
Tokyo Electron Limited
0 cites
US119903342024
Method for Tuning Stress Transitions of Films on a Substrate
Tokyo Electron Limited
0 cites
US118416172023
Method of Forming a Narrow Trench
Tokyo Electron Limited
0 cites
US117823462023
Method of Patterning a Substrate Using a Sidewall Spacer Etch Mask
Tokyo Electron Limited
0 cites
US116825592023
Method to Form Narrow Slot Contacts
Tokyo Electron Limited
0 cites
US116565502023
Controlling Semiconductor Film Thickness
Tokyo Electron Limited
0 cites