Patents/Inventors

Joan Rey Villarba Buot

Escondido, CAUS25 patents

19 Patents

US126223132026
Metal Pocket Fanout Package
QUALCOMM INCORPORATED
0 cites
US126108692026
Integrated Circuit (IC) Package Employing a Metal Block with Metal Interconnects Thermally Coupling a Die to an Interposer Substrate for Dissipating Thermal Energy of the Die, and Related Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US125937092026
Substrate(s) for an Integrated Circuit (IC) Package Employing a Core Layer and an Adjacent Insulation Layer(s) with an Embedded Metal Structure(s) Positioned from the Core Layer
QUALCOMM INCORPORATED
0 cites
US125819662026
Electronic Component Placed on Core of Substrate
QUALCOMM INCORPORATED
0 cites
US125001462025
Substrate(s) for an Integrated Circuit (IC) Package Employing a Metal Core for Improved Electrical Shielding and Structural Strength, and Related IC Packages and Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US123811742025
Integrated Circuit (IC) Packages Employing Wire Bond Channel Over Package Substrate, and Related Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US123622692025
Integrated Circuit (IC) Packages Employing Supplemental Metal Layer Coupled to Embedded Metal Traces in a Die-side Embedded Trace Substrate (ETS) Layer, and Related Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US122305522025
Recess Structure for Padless Stack Via
QUALCOMM INCORPORATED
0 cites
US121006452024
Integrated Circuit (IC) Package Employing Added Metal for Embedded Metal Traces in Ets-based Substrate for Reduced Signal Path Impedance, and Related Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US120210632024
Circular Bond Finger Pad
QUALCOMM INCORPORATED
0 cites
US119554092024
Substrate Comprising Interconnects in a Core Layer Configured for Skew Matching
QUALCOMM INCORPORATED
0 cites
US118323912023
Terminal Connection Routing and Method the Same
QUALCOMM INCORPORATED
0 cites
US118046452023
Multi-sided Antenna Module Employing Antennas on Multiple Sides of a Package Substrate for Enhanced Antenna Coverage, and Related Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US117913202023
Integrated Circuit (IC) Packages Employing a Package Substrate with a Double Side Embedded Trace Substrate (ETS), and Related Fabrication Methods
QUALCOMM INCORPORATED
0 cites
US117912762023
Package Comprising Passive Component Between Substrates for Improved Power Distribution Network (PDN) Performance
QUALCOMM INCORPORATED
0 cites
US117640762023
Semi-embedded Trace Structure with Partially Buried Traces
QUALCOMM INCORPORATED
0 cites
US116769052023
Integrated Circuit (IC) Package with Stacked Die Wire Bond Connections, and Related Methods
QUALCOMM INCORPORATED
0 cites
US115812512023
Package Comprising Inter-substrate Gradient Interconnect Structure
QUALCOMM INCORPORATED
0 cites
US115629622023
Package Comprising a Substrate and Interconnect Device Configured for Diagonal Routing
QUALCOMM INCORPORATED
0 cites