Patents/Inventors

Jiong Luo

Morgan Hill, CAUS2 patents

3 Patents

US126085232026
Application-specific Integrated Circuit (ASIC) Synthesis Based on Lookup Table (LUT) Mapping and Optimization
Synopsys, Inc.
0 cites
US121751762024
Fast Synthesis of Logical Circuit Design with Predictive Timing
Synopsys, Inc.
0 cites
US116696652023
Application-specific Integrated Circuit (ASIC) Synthesis Based on Lookup Table (LUT) Mapping and Optimization
Synopsys, Inc.
0 cites